• Journal of Advanced Research in Ocean Engineering
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• v.3 no.4
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• pp.193-203
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• 2017

This study investigated the steady-flow effects present in the numerical computation of the resistance added to a ship in waves. For a ship advancing in the forward direction, a time-domain 3D Rankine panel method is applied to solve the ship motion problem, and the added resistance due to waves is calculated using a near-field method, with the direct integration of the second-order pressure on the hull surface. In the linear potential theory, the steady flow is approximated by the basis potential of a uniform flow or double-body flow in order to linearize the boundary conditions. By applying these two different linearization schemes, the coupling effects between steady and unsteady solutions were examined. Furthermore, in order to analyze the steady-flow effects on the hull geometry, the computation results for two realistic hull forms, a KVLCC2 tanker and DTC containership, were compared. In particular, the mj term, which represents the coupling effects under the body boundary condition, was evaluated considering the geometry of a non-wall-sided ship. Lastly, the characteristics of the linearization schemes were examined in relation to the disturbed waves around a ship and the components of added resistance.

• Journal of the Society of Naval Architects of Korea
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• v.48 no.6
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• pp.560-568
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• 2011

In SPH(Smoothed Particle Hydrodynamics) method, the fluid has been assumed that it is weakly compressible to solve the basic equations composed of Navier-Stokes equations and continuity equation. That leads to some drawbacks such as non-physical pressure fluctuations and a restriction as like small time steps in computation. In this study, to improve these problems we assume that the fluid is incompressible and the velocity-pressure coupling problem is solved by a projection method(that is, by ISPH method). The two-dimensional computation results of dam breaking and gravitational wave generation are respectively compared with the results of finite volume method and analytical method to confirm the accuracy of the present numerical computation technique. And, the agreements are comparatively acceptable. Subsequently, the green water simulations of a two-dimensional fixed barge are carried out to inspect the possibility of practical application to ship hydrodynamics, those correspond to one of the violent free surface motions with impact loads. The agreement between the experimental data and the present computational results is also comparatively good.

• The KIPS Transactions:PartA
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• v.10A no.4
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• pp.347-356
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• 2003

The OCT algorithm needs efficient hardware architecture to compute inner product. The conventional methods have large hardware complexity. Because of this reason. a computation sharing multiplier was proposed for implementing inner product. However, the existing multiplier has inefficient hardware architecture in precomputer and select units. Therefore it degrades the performance of the multiplier. In this paper, we proposed a new efficient computation sharing multiplier and applied it to implementation of 1-D DCT processor. The comparison results show that the new multiplier is more efficient than an old one when hardware architectures and logic synthesis results were compared. The designed 1-D DCT processor by using the proposed multiplier is more high performance than typical design methods.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.10
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• pp.4849-4864
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• 2019

Modern applications such as augmented reality, connected vehicles, video streaming and gaming have stringent requirements on latency, bandwidth and computation resources. The explosion in data generation by mobile devices has further exacerbated the situation. Mobile Edge Computing (MEC) is a recent addition to the edge computing paradigm that amalgamates the cloud computing capabilities with cellular communications. The concept of MEC is to relocate the cloud capabilities to the edge of the network for yielding ultra-low latency, high computation, high bandwidth, low burden on the core network, enhanced quality of experience (QoE), and efficient resource utilization. In this paper, we provide a comprehensive overview on different traits of MEC including its use cases, architecture, computation offloading, security, economic aspects, research challenges, and potential future directions.

• Journal of the Korean Solar Energy Society
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• v.25 no.1
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• pp.65-78
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• 2005

The objective of this paper is to develop a automatic computation module for optimum stories in apartment buildings in order to assure the solar access right for neighboring areas. Compared to the existing solar access right analysis programs, the proposed solar access right analysis program is more improved and expanded by automating the computing process of optimum stories in apartment buildings. With the result of this research, it would be possible to furnish advanced information for an amicable settlement against the civil petition and disputes, to reduce waste of the time and money, and to improve the efficiency of solar access right analysis works.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.561-564
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• 2004

The motion estimation which requires huge computation consumes large power in a video encoder. Although a number of fast-search algorithms are proposed to reduce the power consumption, the smaller the computation, the worse the performance they have. In this paper, we propose an architecture that a low energy management scheme can be applied with several fast-search algorithm. In addition. we show that ECVH, a software scheduling scheme which dynamically changes the search algorithm, the operating frequency, and the supply voltage using the remaining slack time within given power-budget, can be applied to the architecture, and show that the power consumption can be reduced.

• Journal of the Society of Naval Architects of Korea
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• v.43 no.2 s.146
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• pp.186-196
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• 2006

The turbulent wake flow of an axisymmetric body at incidence of $10.1^{\circ}$ is investigated by commericial CFD code, Fluent 6.2. Reynolds stress turbulence model with wall function is applied for the turbulent flow computation. For the grid generation, the Gridgen V15 is used. Numerical predictions are compared with experimental data for the validation. The computed results show goof agreements with the experimental measurements, implying that the CFD analysis is a useful and efficient tool for predicting turbulent flow characteristics of wake field of an axisymmetric body at incidence.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.52 no.5
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• pp.295-304
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• 2003

In this paper, we proposed a hardware-oriented Genetic Algorithm Processor(GAP) based on subpopulation architecture for high-performance convergence and reducing computation time. The proposed architecture was applied to enhancing population diversity for correspondence to premature convergence. In addition, the crossover operator selection and linear ranking subpop selection were newly employed for efficient exploration. As stochastic search space selection through linear ranking and suitable genetic operator selection with respect to the convergence state of each subpopulation was used, the elapsed time of searching optimal solution was shortened. In the experiments, the computation speed was increased by over $10\%$ compared to survival-based GA and Modified-tournament GA. Especially, increased by over $20\%$ in the multi-modal function. The proposed Subpop GA processor was implemented on FPGA device APEX EP20K600EBC652-3 of AGENT 2000 design kit.

• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2576-2578
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• 2001

Elliptic curve cryptosystems based on discrete logarithm problem in the group of points of an elliptic curve defined over a finite field. The discrete logarithm in an elliptic curve group appears to be more difficult than discrete logarithm problem in other groups while using the relatively small key size. An implementation of elliptic curve cryptosystems needs finite field arithmetic computation. Hence finite field arithmetic modules must require less hardware resources to archive high performance computation. In this paper, a new architecture of finite field multiplier using conversion scheme of normal basis representation into polynomial basis representation is discussed. Proposed architecture provides less resources and lower complexity than conventional bit serial multiplier using normal basis representation. This architecture has synthesized using synopsys FPGA express successfully.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.6
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• pp.96-103
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• 1999

This paper proposes efficient VLSI architecture for computation of the 1-D discrete wavelet transform (DWT). The proposed VLSI architecture computes the wavelet lowpass and highpass output sequences using the product term anhm, $n,m{\ge}0$, where an and hm denote the imput sequence and the wavelet lowpass filter coefficient, respectively. Whereas the conventional architectures compute the lowpass and highpass output sequences using the product terms anhm and angm, respectively, where gm denotes the wavelet highpass filter coefficient. The proposed architecture is applied to computation of the Daubechies 4-tap wavelet transform using the relationships between the Daubechies wavelet filter coefficients. Performance comparison of various architectures for computation of the 1-D DWT are presented. Note that the proposed architecture does not require extra processing units whereas the conventional architectures need them. Also it is modeled in very high speed integrated circuit hardware description language (VHDL) and simulated to show its functional validity.