• Title/Summary/Keyword: Communication Chip

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Vision based MLGA Chip Mounting System (Vision을 이용한 MLGA Chip 장착시스템 개발)

  • No, Byeong-Ok;Yu, Yeong-Gi;Kim, An-Sik;Kim, Yeong-Su
    • Journal of the Korean Society for Precision Engineering
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    • v.18 no.11
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    • pp.161-167
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    • 2001
  • In this study, the control of mounting system for MLGA package was developed using machine vision for the control of rotation position compensation and mounting position of X-Y table. Two types of materials, polymer and alumina, were used for the dielectric insulator of the MLGA. The illumination system and the algorithm of position compensation which is suitable for these materials was developed. We found that the mounting accuracy enough to the degree of${\pm}10{\mu}m$ when MLGA was mounted on the PCB.

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Fabrication of Micromachined On-chip High Ratio Air Core Solenoid Inductor (MEMS에 의한 On-chip 고종횡비 Air Core Solenoid 인덕터의 제작)

  • Lee Jeong-Bong;Kim Kyung-Hwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.8
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    • pp.780-784
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    • 2006
  • We present high aspect ratio air-core solenoid inductors with $100{\mu}m\;and\;200{\mu}m$ tall via structures on Pyrex wafer. The effect of various parameters such as different number of turns, via heights, pitch distance between turns on inductor's radio frequency (RF) characteristics have been studied. The highest Q factor we obtained from various solenoid inductors is 72.8 at 9.7 GHz, which was produced by a 3-turn inductor.

Frequency Domain Methods for Demosaicking of Single-Chip RGB/NIR Image Sensors

  • Jeong, Kil-Hyun
    • Journal of the Korea Society of Computer and Information
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    • v.22 no.11
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    • pp.25-30
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    • 2017
  • In this paper, We proposed an effective demosaicking method for single chip RGB-NIR sensors to recover RGB and NIR images. As the method operates in the spatial frequency domain, the frequency domain characteristics of the sampled CFA data are investigated. Using the luminance signal in the frequency domain and the chrominance signals are processed separately with different filters. The simulated images using the real images are compared with other state-of-art methods. As a result, the proposed demosaicking method resulted an effective calculation by a single processing which the existing alternating projection method requires repeated calculation.

Application Technology Development of Lon Works Fieldbus Network System for Distributed Control System Based Water Treatment Facility

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.05a
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    • pp.404-411
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    • 2004
  • With distribution industrial control system, the use of low cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with CPLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS (Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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Design of a Multi-Valued Arithmetic Processor with Encoder and Decoder (인코더, 디코오더를 가지는 다치 연산기 설계)

  • 박진우;양대영;송홍복
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.1
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    • pp.147-156
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    • 1998
  • In this paper, an arithmetic processor using multi-valued logic is designed. For implementing of multi-valued logic circuits, we use current-mode CMOS circuits and design encoder which change binary voltage-mode signals to multi-valued current-mode signals and decoder which change results of arithmetic to binary voltage-mode signals. To reduce the number of partial product we use 4-radix SD number partial product generation algorithm that is an extension of the modified Booth's algorithm. We demonstrate the effectiveness of the proposed arithmetic circuits through SPICE simulation and Hardware emulation using FPGA chip.

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Process Optimization for Flexible Printed Circuit Board Assembly Manufacturing

  • Hong, Sang-Jeen;Kim, Hee-Yeon;Han, Seung-Soo
    • Transactions on Electrical and Electronic Materials
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    • v.13 no.3
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    • pp.129-135
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    • 2012
  • A number of surface mount technology (SMT) process variables including land design are considered for minimizing tombstone defect in flexible printed circuit assembly in high volume manufacturing. As SMT chip components have been reduced over the past years with their weights in milligrams, the torque that once helped self-centering of chips, gears to tombstone defects. In this paper, we have investigated the correlation of the assembly process variables with respect to the tombstone defect by employing statistically designed experiment. After the statistical analysis is performed, we have setup hypotheses for the root causes of tombstone defect and derived main effects and interactions of the process parameters affecting the hypothesis. Based on the designed experiments, statistical analysis was performed to investigate significant process variable for the purpose of process control in flexible printed circuit manufacturing area. Finally, we provide beneficial suggestions for find-pitch PCB design, screen printing process, chip-mounting process, and reflow process to minimize the tombstone defects.

Development of Intelligent Control Module with ANSI/EIA 709.1 for Water Treatment Facility

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2003.11a
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    • pp.243-249
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    • 2003
  • With distribution industrial control system, the use of tow cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with PLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS(Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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A Mark Automatic Checking System to Inspect Character String on Chip (칩의 문자들을 검사하기 위한 마크 자동 검사 시스템)

  • Kim, Eun-Seok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.3
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    • pp.577-583
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    • 2007
  • The character strings on chips and components are so tiny and numerous that it is a very difficult work for people to perform. In this paper, we propose a mark automatic checking system, which will determine whether chip is wrong-mark or not by recognizing characters on chips. Lots of faulty detection conditions and template matching methods are used to inspect the faulty mark items. The faulty detection classifies conditions as five kinds-darkness, matching, area, broken and branch. A series of experimentation show that the method proposed here can offer an effective way to determine wrong-mark on chips.

Electric Therapy System Based on Discontinuous Conduction Mode Boost Circuit

  • Chen, Wenhui;Lee, Hyesoo;Jung, Heokyung
    • Journal of information and communication convergence engineering
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    • v.18 no.4
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    • pp.245-253
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    • 2020
  • The human body and nervous system transmit information through electric charges. After the electric charge transmits information to the brain, we can feel pain, numbness, comfort, and other feelings. Electric therapy is currently used widely in clinical practice because the field of examination is more representative of electrocardiogram, and in the field of treatment is more representative of electrotherapy. In this study, we design a system for neurophysiological therapy and conduct parameter calculation and model selection for the components of the system. The system is based on a discontinuous conduction mode (DCM) boost circuit, and controlled and regulated by a single-chip microcomputer. The system does not only have a low cost but also fully considers the safety of use, convenience of the human-computer interface, adjustment sensitivity, and waveform diversity in the design. In future, it will have strong implications in the field of electrotherapy.

Copper Interconnection and Flip Chip Packaging Laboratory Activity for Microelectronics Manufacturing Engineers

  • Moon, Dae-Ho;Ha, Tae-Min;Kim, Boom-Soo;Han, Seung-Soo;Hong, Sang-Jeen
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.431-432
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    • 2012
  • In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

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