• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2004년도 하계학술대회 논문집 B
• /
• pp.1232-1234
• /
• 2004

In this paper, we represent both occurrence reason of Surge-voltage and Leakage current of AC drive system which is operated by Voltage-type PWM Inverter. It generates a compensating voltage which has the same amplitude as, but the opposite phase to, the common-mode voltage produced by the PWM inverter. The compensating voltage is superimposed on the inverter output by a common-mode transformer. As a result, the common-mode voltage applied to the load is canceled completely. The design method of the active common-mode noise canceler is also presented in detail. Therefore, we try to describe the method controling both of them and all of the proprieties are proved by our experiment.

• Journal of Power Electronics
• /
• 제18권3호
• /
• pp.923-930
• /
• 2018

Based on the application of an integrated dynamic brake (IDB) system that uses a PWM inverter fed-AC motor drive to operate the piston, a new active zero state PWM (AZSPWM) is proposed to improve the stability and reliability of the IDB system by suppressing the conducted electro-magnetic interference (EMI) noise under a wide range of load torque. The new AZSPWM reduces common-mode voltage (CMV) by one-third when compared to that of the conventional space vector PWM (CSVPWM). Although this method slightly increases the output current ripple by reducing the CMV, like the CSVPWM, it can be used within the full range of the load torque. Further, unlike other reduced common-mode voltage (RCMV) PWMs, it does not increase the switching power loss. A theoretical analysis is presented and experiments are performed to demonstrate the effectiveness of this method.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
• /
• pp.1515-1517
• /
• 2005

In this paper, we represent both occurrence reason of Surge-voltage and Leakage-current of AC drive system which is operated by Voltage-type PWM Inverter. It generates a compensating voltage which has the same amplitude as, but the opposite phase to, the common-mode voltage produced by the PWM inverter. The compensating voltage is superimposed on the inverter output by a common-mode transformer. As a result, the common-mode voltage applied to the load is canceled completely. The design method of the active common-mode noise canceler is also presented in detail. Therefore, we try to describe the method controling both of them and all of the proprieties are proved by our experiment.

• Journal of Power Electronics
• /
• 제12권2호
• /
• pp.276-284
• /
• 2012

AC/AC power conversion is widely used to feed AC loads with a variable voltage and/or a variable frequency from a constant voltage constant frequency power grid or to connect critical loads to an unreliable power supply while delivering a very balanced and accurate sinusoidal voltage system of constant amplitude and frequency. The load specifications will clearly impose the requirements for the inverter stage of the power converter, while wider ranges of choices are available for the rectifier. This paper investigates the utilization of a buck-type current source rectifier as the active front-end stage of an AC/AC converter for applications that require an adjustable DC-link voltage as well as elimination of the low-frequency common mode voltage. The proposed solution is to utilize a combination of two or more zero current vectors in the Space Vector Modulation (SVM) technique for Current Sources Rectifiers (CSR).

• 전력전자학회논문지
• /
• 제5권3호
• /
• pp.246-253
• /
• 2000

전동기의 제어기법과 제어기 등의 발달로 유도전동기는 산업용으로 널리 보급되고 있으며, 유도전동기를 고효율로 제어하기 위하여 PWM 인버터가 널리 사용되고 있다. 그리고 IGBT와 같은 고속 스위칭 소자의 발달로 인해 전압형 PWM 인버터의 스위칭 주파수가 증가가 가능하게 됐으며, 그로 인해 매우 우수한 동작 특성을 가지게 되었다. 그러나 고속 스위칭은 전압과 전류의 급격한 변화로 인해 매 스위칭마다 발생하는 고주파 성분의 커먼 모드전압과 전류를 발생하게 되고 이들은 베어링 전류와 축전압, 전도 및 방사 EMI, 기기의 절연수명 단축, 등의 악영향을 유발한다. 본 연구에서는 이러한 커먼 모드 전압과 전류에 대한 시스템 레벨 해석이 가능한 시뮬레이션 기법에 대해 실제 측정과 시뮬레이션을 통해 검정하였다. 이를 통해서 커먼 모드 전압과 전류가 PWM 인버터 시스템의 각 부에 미치는 영향을 쉽게 확인 할 수 있으며, 커먼 모드 전압과 전류의 저감을 위해 추가될 수 있는 부가적인 보조회로의 영향에 대해서도 제시된 시뮬레이션 기법을 통해 확인 할 수 있다.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2004년도 ICCAS
• /
• pp.504-508
• /
• 2004

An EMC analysis of a switched mode power supply (SMPS) have been usually using unbalance circuit topologies and the major factor of disturbance is parasitic capacitance. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common mode conducted noise. In this paper presents the relationship between common mode current and radiated field.

• Journal of Power Electronics
• /
• 제16권6호
• /
• pp.2258-2271
• /
• 2016

In this paper, some crucial performance characteristics related to the operational reliability of the post-fault Pulse Width Modulated (PWM) rectifiers, such as line current harmonic distortion, Common Mode Voltage (CMV), and current stress on the capacitors, are fully investigated. The aforementioned performance characteristics of post-fault rectifiers are highly dependent on the utilized space vector modulation (SVM) schemes, which are also examined. Detailed analyses of the three most commonly used SVM schemes for post-fault PWM rectifiers are provided, revealing the major differences in terms of the zero vector synthesis approaches. To compare the performances of the three SVM schemes, the operating principles of a post-fault rectifier are presented with various SVM schemes. Using analytical and numerical methods in the time domain, the performances of the line current distortion, common mode voltage and capacitor current are evaluated and compared for each SVM scheme. The proposed analysis demonstrates that the zero vector synthesis approaches of the considered methods have significant impacts on the performance characteristics of rectifiers. In addition, the advantages and disadvantages of the proposed SVM schemes are discussed. The experimental results verify the effectiveness and validity of the proposed analysis.

• Journal of Power Electronics
• /
• 제19권4호
• /
• pp.907-921
• /
• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2003년도 ICCAS
• /
• pp.1881-1884
• /
• 2003

In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

• Journal of Electrical Engineering and Technology
• /
• 제9권1호
• /
• pp.301-306
• /
• 2014

We proposed a new PCB-type 'common-mode current($I_c$) and differential-mode current($I_d$) detector' working for fast detection of $I_c$ and $I_d$ from the differential-mode signaling, with miniaturization effect and possibility of cheaper fabrication. In order to realize this device, we suggest a branch-line-coupler balun having a composite right- and left-handed(CRLH) one-layer microstrip phase-shifting line as compact as roughly ${\lambda}_g/14$. The presented balun obviously is different from the conventional bent-&-folded delay lines or slits on the ground for coupling the lines on the top and bottom dielectrics. As we connect the suggested balun output ports of the differential-mode signal lines via the through-port named U and coupled-port named L, $I_c$ and $I_d$ will appear at port ${\Delta}$ and port ${\Sigma}$ of the present device, in order. The validity of the design scheme is verified by the circuit-and numerical electromagnetic analyses, and the dispersion curve proving the metamaterial characteristics of the geometry. Besides, the examples of the $I_c$ and $I_d$ indicator are observed as the even and odd modes in differential-mode signal feeding. Also, the proposed device is shown to be very compact, compared with the conventional structure.