• ETRI Journal
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• 제24권6호
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• pp.429-434
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• 2002

This paper investigates the effect of a corrugated aperture on a common-mode current traveling along a penetrating wire. Computational results illustrate that the corrugated aperture acts as a filter, significantly reducing the common-mode current on the wire. This effect causes a reduction of radiated emission from cables passing through apertures on shielding enclosures. To predict and analyze the characteristics of the common-mode current on a straight wire passing through a corrugated aperture with cylindrical symmetry, the finite-difference time-domain (FDTD) method is applied.

• Journal of Power Electronics
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• 제19권6호
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• pp.1477-1485
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• 2019

This paper proposes an effective model predictive current control (MPCC) that involves using 10 virtual voltage vectors to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI). In the proposed scheme, 10 virtual voltage vectors are included to reduce the CMV and low-order current harmonics. These virtual voltage vectors are employed as the input control set for the MPCC. Among the 10 virtual voltage vectors, two are applied throughout the whole sampling period to reduce current ripples. The two selected virtual voltage vectors are based on location information of the reference voltage vector, and their duration times are calculated using a simple algorithm. This significantly reduces the computational burden. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제48권2호
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• pp.89-96
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• 1999

This paper proposes a common-mode voltage reduction method base on SVPWM(Space-Vector Pulsewidth Modulation) in three phase PWM converter/inverter system. By shifting the active voltage vector of inverter and aligning this to the active vector of converter, it is possible to eliminate a common-mode voltage pulse in one control period. Since the proposed PWM method maintains the active voltage vector, it does not affect the control performance of PWM converter/inverter system. Without any extra hardware, overall common mode voltage dv/dt and conrresponding leakage current can be reduced to two-third of the conventional three phase symmetric SVPWM scheme.

• 전력전자학회논문지
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• 제27권5호
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• pp.446-454
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• 2022

This study proposes a carrier-based pulse width modulation (PWM) method for leakage current reduction and neutral point (NP) current control in a three-phase three-level converter, which is a carrier-based PWM version of the previously proposed low-frequency common mode voltage PWM. Three groups of space vectors with the same common mode voltage are used. When the averaged NP current needs to be positive or negative, the specific groups are employed to produce low-frequency common mode voltages. The validity of the proposed PWM method is verified through experiments.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2004년도 ICCAS
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• pp.493-498
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• 2004

The EMI noise source in a switching mode power supply is dominated by a common mode noise. If we can understand the common mode noise occurring mechanism, it is resulted to find out the method to suppress the EMI noise source in the switching mode power supply. The common mode noise is occurring mostly due to circuit is unbalanced which is caused by the capacitive coupling to frame ground, which passes through a heatsink of the switching devices. This research paper presents a new effective balancing method of buck converter circuit by mean of grounding the parasitic and compensation capacitors in correct proportion which is called that the common mode impedance balance (CMIB). The CMIB can be achieved by source, transmission line and termination balanced, such balancing, the common mode current will be cancelled out in the frame ground. The greatly reduced common mode noise can be confirmed by the experimental results.

• 전력전자학회논문지
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• 제27권2호
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• pp.85-91
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• 2022

This study proposes a high efficiency bridgeless Power Factor Correction (PFC) converter with improved common mode noise characteristics. Conventional PFC has limitations due to low efficiency and enlarged heat sink from considerable conduction loss of bridge diode. By applying a Common Mode (CM) coupled inductor, the proposed bridgeless PFC converter generates less conduction loss as only a small magnetizing current of the CM coupled inductor flows through the input diode, thereby reducing or removing heat sink. The input diode is alternately conducted every half cycle of 60 Hz AC input voltage while a negative node of AC input voltage is always connected to the ground, thus improving common mode noise characteristics. With the aim to improve switching loss and reverse recovery of output diode, the proposed circuit employs Critical Conduction Mode (CrM) operation and it features a simple Zero Current Detection (ZCD) circuit for the CrM. In addition, the input current sensing is possible with the shunt resistor instead of the expensive current sensor. Experimental results through 480 W prototype are presented to verify the validity of the proposed circuit.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 연구회 합동 학술발표회 논문집
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• pp.18-22
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• 1998

A PWM inverter with an induction motor often has a problem with a high frequency leakage current that flows through stray capacitor between stator windings and a motor frame to ground. This paper presents an equivalent circuit for high frequency leakage currents in PWM inverter feeding an induction motor, which forms an LCR series resonant circuit. A conventional common mode ckoke or reactor in series between the ac terminals of a PWM inverter and those of an ac motor is not effective to reduce the rms and average values of the leakage current, but effective to reduce the peak value. Furthermore, this paper proposes a leakage current damper which is different in damping principle from the conventional common mode choke. It is shown theoretically and experimentally that the leakage current damper is able to reduce the rms value of the leakage current to 25%, where the core used in the leakage current damper is smaller than that of the conventional common-mode choke

• 한국통신학회논문지
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• 제17권8호
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• pp.867-880
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• 1992

본 논문에서는 갈륨비소 연산 증폭기의 입력단 설계에 있어서 기초가 되는 차동 증폭기에 사용될 이득 증가 기법을 적용한 단일 증폭기와 새로운 구성의 전류 미러를 설계하였다.차동 전압 이득을 높이기 위하여 단일 증폭기의 bootstrap 이득 증가 기법을 이용하여 차증 증폭기를 구성하였다. 차동 증폭기에 사용되는 정전류원으로서 주파수 특성이 우수한 선형 역상 전류 미러를 사용하여 회로의 안정화를 꾀하였다. 또한, 동상 전압 이득을 감소시키기 위하여 common mode feedback을 사용함으로써 차동 증폭기의 성능 평가에 있어서중요한 CMRR을 높였다.PSPICE를 통한 시뮬레이션 결과, 기본 단일 증폭기의 이득은 29.dB인데 비하여 새로 설계된 new bootstrapped 이득 증가 기법을 사용한 경우에는 57.67db로써 이득이 28.26dB 개선되었음을 알 수 있었다. 또한, 본 논문에서 설계한 차동 증폭기는 차동 이득이 57.66dB, CMRR이 83.98dB로써 기존의 논문보다 향상되었고 주파수 특성면에서도 차단 주파수가 23.26GHz로써 우수함을 입증하였다.

• Journal of Power Electronics
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• 제18권3호
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• pp.871-878
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• 2018

In this paper, the conducted EMI reduction performances of active feed-forward current-sensing current-actuation (CSCA) and voltage-sensing current-actuation (VSCA) filters for a three-phase induction motor drive system are evaluated by experiments. For comparison purposes, the conducted EMI (CM emission, DM emission and total emission) of a three-phase induction motor drive with a conventional CM choke, a conventional CM choke in series with an active VSCA filter, and an active CSCA filter (where the CM choke was modified and used as a sensing current transformer) were compared to the case of a system without any filter inserted. Experimental results show that the active CSCA and VSCA filters can improve the CM reduction performance of the conventional CM choke by about 5 dB especially at low-frequencies. However, for DM comparisons, it shows that there is no different between cases with and without filters inserted.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.383-384
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• 2015

This paper presents a new space vector modulation (SVM) method for indirect matrix converters (IMCs) to reduce commonmode voltage as well as minimize output current ripple in a high voltage transfer ratio. In the proposed SVM, the three-vector modulation scheme is used in the rectifier stage, while the nonzero state modulation technique, where the three nearest active vectors are selected to synthesize the desired output voltage, is applied to inverter stage to reduce the CMV. The proposed SVM method can significantly reduce the output current ripple and common-mode voltage of the IMC without any extra hardware. Simulated results are provided to demonstrate the effectiveness of the proposed SVM method.