• Title/Summary/Keyword: Code Optimization

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Code Generation and Optimization for the Flow-based Network Processor based on LLVM

  • Lee, SangHee;Lee, Hokyoon;Kim, Seon Wook;Heo, Hwanjo;Park, Jongdae
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.11a
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    • pp.42-45
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    • 2012
  • A network processor (NP) is an application-specific instruction-set processor for fast and efficient packet processing. There are many issues in compiler's code generation and optimization due to NP's hardware constraints and special hardware support. In this paper, we describe in detail how to resolve the issues. Our compiler was developed on LLVM 3.0 and the NP target was our in-house network processor which consists of 32 64-bit RISC processors and supports multi-context with special hardware structures. Our compiler incurs only 9.36% code size overhead over hand-written code while satisfying QoS, and the generated code was tested on a real packet processing hardware, called S20 for code verification and performance evaluation.

Real-time Implementation of the AMR-WB+ Audio Coder using ARM Core(R) (ARM Core(R)를 이용한 AMR-WB+ 오디오 부호화기의 실시간 구현)

  • Won, Yang-Hee;Lee, Hyung-Il;Kang, Sang-Won
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.46 no.3
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    • pp.119-124
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    • 2009
  • In this paper, AMR-WB+ audio coder is implemented, in real-time, using Intel 400MHz Xscale PXA250 with 32bit RISC processor ARM9E-J(R)core. The assembly code for ARM9E-J(R)core is developed through the serial process of C code optimization, cross compile, assembly code manual optimization and adjusting the optimized code to Embedded Visual C++ platform. C code is trimmed on Visual C++ platform. Cross compile and assembly code manual optimization are performed on CodeWarrior with ARM compiler. Through these stages the code for both ARM EVM board and PDA is implemented. The average complexities of the code are 160.75MHz on encoder and 33.05MHz on decoder. In case of static link library(SLL), the required memories are 65.21Kbyte, 32.01Kbyte and 279.81Kbyte on encoder, decoder and common sources, respectively. The implemented coder is evaluated using 16 test vectors given by 3GPP to verify the bit-exactness of the coder.

Optimization of HE-AAC for Korean S-DMB Using TMS320C55x DSP Core

  • Kim, Hyung-Jung;Jee, Deock-Gu
    • The Journal of the Acoustical Society of Korea
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    • v.25 no.4E
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    • pp.137-141
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    • 2006
  • This paper presents HE-AAC decoder optimization on TMS320C55x fixed-point DSP core using a DSP-C like FFR code, which provides fast and flexible porting to a DSP core. Our optimization efforts are focused on methodologies that include general optimization methods of FFR code suitable for general DSP or RISC platform in high-level language and software optimization methods in assembly language level. The implementation result requires 48 MIPS and 135 Kbytes memory space to decode 48 Kbps stereo using real Korean S-DMB data.

An Assignment Motion to Suppress the Unnecessary Code Motion (불필요한 코드 모션 억제를 위한 배정문 모션)

  • Shin, Hyun-Deok;Lee, Dae-Sik;Ahn, Heui-Hak
    • Journal of Internet Computing and Services
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    • v.9 no.1
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    • pp.55-67
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    • 2008
  • This paper presents the assignment motion algorithm unrestricted for code optimization computationally. So, this algorithm is suppressed the unnecessary code motion in order to avoid the superfluous register pressure, we propose the assignment motion algorithm added to the final optimization phase. This paper improves an ambiguous meaning of the predicate. For mixing the basic block level analysis with the instruction level analysis, an ambiguity occurred in Knoop's algorithm. Also, we eliminate an ambiguity of it. Our proposal algorithm improves the runtime efficiency of a program by avoiding the unnecessary recomputations and reexecutions of expressions and assignment statements.

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An Assignment Motion Algorithm to Suppress the Unnecessary Code Motion (불필요한 코드모션 억제를 위한 배정문 모션 알고리즘)

  • Shin, Hyun-Deok;Ahn, Heui-Hak
    • The KIPS Transactions:PartA
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    • v.8A no.1
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    • pp.27-35
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    • 2001
  • This paper presents the assignment motion algorithm unrestricted for code optimization computationally. So, this algorithm is suppressed the unnecessary code motion in order to avoid the superfluous register pressure, we propose the assignment motion algorithm added to the final optimization phase. This paper improves an ambiguous meaning of the predicated. For mixing the basic block level analysis with the instruction level analysis, an ambiguity occurred in knoop’s algorithm. Also, we eliminate an ambiguity of it. Our proposal algorithm improves the runtime efficiency of a program by avoiding the unnecessary recomputations and reexecutions of expressions and assignment statements.

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APPLICATION OF A GENETIC ALGORITHM FOR THE OPTIMIZATION OF ENRICHMENT ZONING AND GADOLINIA FUEL (UO2/Gd2O3) ROD DESIGNS IN OPR1000s

  • Kwon, Tae-Je;Kim, Jong-Kyung
    • Nuclear Engineering and Technology
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    • v.44 no.3
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    • pp.273-282
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    • 2012
  • A new effective methodology for optimizing the enrichment of low-enriched zones as well as gadolinia fuel ($UO_2/Gd_2O_3$) rod designs in PLUS7 fuel assemblies was developed to minimize the maximum peak power in the core and to maximize the cycle lifetime. An automated link code was developed to integrate the genetic algorithm (GA) and the core design code package of ALPHA/PHOENIX-P/ANC and to generate and evaluate the candidates to be optimized efficiently through the integrated code package. This study introduces an optimization technique for the optimization of gadolinia fuel rod designs in order to effectively reduce the peak powers for a few hot assemblies simultaneously during the cycle. Coupled with the gadolinia optimization, the optimum enrichments were determined using the same automated code package. Applying this technique to the reference core of Ulchin Unit 4 Cycle 11, the gadolinia fuel rods in each hot assembly were optimized to different numbers and positions from their original designs, and the maximum peak power was decreased by 2.5%, while the independent optimization technique showed a decrease of 1.6% for the same fuel assembly. The lower enrichments at the fuel rods adjacent to the corner gap (CG), guide tube (GT), and instrumentation tube (IT) were optimized from the current 4.1, 4.1, 4.1 w/o to 4.65, 4.2, 4.2 w/o. The increase in the cycle lifetime achieved through this methodology was 5 effective full-power days (EFPD) on an ideal equilibrium cycle basis while keeping the peak power as low as 2.3% compared with the original design.

Design Optimization of Nuclear Power Plant Structures with High-Strength Reinforcements (원전구조물의 고강도철근 설계 최적화 방안)

  • Lee, Byung Soo
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2017.11a
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    • pp.137-138
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    • 2017
  • Generally, a lot of reinforcements are used in nuclear power plant concrete structures in order to improve the structural safety, but it may cause several potential problems due to the overcrowded reinforcement, such as the degradation of concrete quality, the construction delay and the increase of construction cost. In order to resolve these problems, structural test researches and code change studies on using high-strength reinforcement (Gr.80) in unclear power plant structures are under way, and there is good progress in code change of ASM BPVC.III.2 and ACI 349. This purpose of this study is to review the code change status ASM BPVC.III.2, ACI 349 under way to use the high-strength reinforcement in nuclear power plant structures. Also I will introduce the design optimization of NPP structures with high-strength reinforcements in order to maximize the effect and minimize the problem when using the high-strength reinforcements in NPP structures.

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A New Approach to Multi-objective Error Correcting Code Design Method (다목적 Error Correcting Code의 새로운 설계방법)

  • Lee, Hee-Sung;Kim, Eun-Tai
    • Journal of the Korean Institute of Intelligent Systems
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    • v.18 no.5
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    • pp.611-616
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    • 2008
  • Error correcting codes (ECCs) are commonly used to protect against the soft errors. Single error correcting and double error detecting (SEC-DED) codes are generally used for this purpose. The proposed approach in this paper selectively reduced power consumption, delay, and area in single-error correcting, double error-detecting checker circuits that perform memory error correction. The multi-objective genetic algorithm is employed to solve the non -linear optimization problem. The proposed method allows that user can choose one of different non-dominated solutions depending on which consideration is important among them. Because we use multi-objective genetic algorithm, we can find various dominated solutions. Therefore, we can choose the ECC according to the important factor of the power, delay and area. The method is applied to odd-column weight Hsiao code which is well- known ECC code and experiments were performed to show the performance of the proposed method.

Mixed-Flow Pump Impeller-Diffuser Optimization Method by Using CFX and HEEDS (CFX 와 HEEDS 를 이용한 사류펌프 임펠러-디퓨저 최적화방법)

  • Lee, Yong Kab;Park, In Hyung;Shin, Jae Hyok;Kim, Sung;Lee, Kyoung Yong;Choi, Young Seok
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.39 no.10
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    • pp.831-842
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    • 2015
  • An optimization process was developed to improve mixed-flow pump performance. The optimization process was combined with CFX (a computational fluid dynamics (CFD) code) and HEEDS (an optimization code). CFX is a widely used CFD software for turbo machinery, whereas HEEDS, which uses the SHERPA algorithm, is a newly introduced optimization code. HEEDS can use a large number of optimization variables; thus, it is possible to effectively consider interaction effects. In this paper, an impeller model, which is already optimized with design of experiments (DOE), is used as the base model. The optimization process developed in this paper shows an improved design within an acceptable timeframe.

Acceleration of LU-SGS Code on Latest Microprocessors Considering the Increase of Level 2 Cache Hit-Rate (최신 마이크로프로세서에서 2차 캐쉬 적중률 증가를 고려한 LU-SGS 코드의 가속)

  • Choi, J.Y.;Oh, Se-Jong
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.30 no.7
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    • pp.68-80
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    • 2002
  • An approach for composing a performance optimized computational code is suggested for latest microprocessors. The concept of the code optimization, called here as localization, is maximizing the utilization of the second level cache that is common to all the latest computer system, and minimizing the access to system main memory. In this study, the localized optimization of LU-SGS (Lower-Upper Symmetric Gauss-Seidel) code for the solution of fluid dynamic equations was carried out in three different levels and tested for several different microprocessor architectures most widely used in these days. The test results of localized optimization showed a remarkable performance gain up to 7.35 times faster solution, depending on the system, than the baseline algorithm for producing exactly the same solution on the same computer system.