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Moleculay Cloning of the cDNA Encoding the 16 kDa Subunit of V-ATPase in Rat Brain (흰쥐 뇌에서 발현되는 16 kDa Vacuolar (H$^{+}$)-ATPase의 유전자 클로닝)

  • Shin, Song-Woo;Yoo, Min
    • Biomedical Science Letters
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    • v.6 no.3
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    • pp.165-170
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    • 2000
  • Vacuolar (H$^{+}$)-ATPase (V-ATPase) is an intracellular protein which consists of multiple subunits. It carries out acidification by pumping protons in the cell. This enzyme has also been found in the synaptic vesicles and may play an important role in the neurotransmission. We cloned cDNA fragments encoding the 16 kDa subunit of V-ATPase from the rat brain by RT-PCR and PCR using total RNA or recombinant phage DNA as templates. They contained the full coding sequences (468 bp) and one nucleotide at 3' region turned out to be different (A to C) when compared to the liver counterpart. However, this polymorphic difference did not cause any significant change in the primary structure of the protein because both GCA and GCC code for alanine. Our study would contribute to the understanding of the function of 16 M)a V-ATPase in the brain and of the mechanisms of neurotransmission.

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Numerical modeling and prediction of adhesion failure of adhesively bonded composite T-Joint structure

  • Panda, Subhransu K;Mishra, Pradeep K;Panda, Subrata K
    • Structural Engineering and Mechanics
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    • v.74 no.6
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    • pp.723-735
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    • 2020
  • This study is reported the adhesion failure in adhesive bonded composite and specifically for the T-joint structure. Three-dimensional finite element analysis has been performed using a commercial tool and the necessary outcomes are obtained via an eight noded solid element (Solid 185-element) from the library of ANSYS. The structural analysis input has been incurred through ANSYS parametric design language (APDL) code. The normal and shear stress distributions along different layers of the joint structure have been evaluated as the final outcomes. Based on the stress distributions, failure location in the composite joint structure has been identified by using the Tsai-Wu stress failure criterion. It has been found that the failure index is maximum at the interface between flange and web part of the joint (top layer) which indicates the probable location of failure initiation. This kind of failures are considered as adhesion failure and the failure propagation is governed by strain energy release rate (SERR) of fracture mechanics. The different adhesion failure lengths are also considered at the failure location to calculate the SERR values i.e. mode I fracture (opening), mode II fracture (sliding) and mode III fracture (tearing) along the failure front. Also, virtual crack closure technique (VCCT) principle of fracture mechanics steps is used to calculate the above said SERRs. It is found that the mode I SERR is more dominating compared to other two modes of failure for the joint considered. Finally, the influences of various parametric (geometrical and material) effect on SERR of the joint structure are evaluated and discussed in details.

Website Design for Improving Web Accessibility of Disabled People (장애인의 웹 접근성 향상을 위한 웹사이트 설계)

  • Lee, Won-Kyung;Seo, Eun-Gyoung
    • Journal of the Korean Society for information Management
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    • v.30 no.1
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    • pp.193-219
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    • 2013
  • Public institutions or libraries urgently prepare comprehensive measures to improve web accessibility of their websites as booting web dependability and web utilization of disabled people. The purpose of this study is to propose the design guidelines for improving web accessibility of disabled people. The study, first, analyzed various web accessibility requirements based on web standards, web accessibility guidelines, and the related researches and proposed a web accessibility checklist with 42 requirement. Next, the study evaluated 15 websites of public institutions such as government departments, association of disabled people, and public libraries using the checklist. Finally, the study revealed non-adherence requirements and suggested website design guidelines in terms of contents configuration, sound, colour, keyboard handling, mouse handling, access, image processing, text processing, and code processing.

Design and Implementation of Interface Middleware for Improved Portability on General Operating System (범용 운영체제의 이식성 향상을 위한 인터페이스 미들웨어 설계 및 구현)

  • Kim, Yeon-Il;Lee, Sang-Gil;Lee, Seung-Il;Lee, Cheol-Hoon
    • The Journal of the Korea Contents Association
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    • v.15 no.4
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    • pp.17-28
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    • 2015
  • The applications program that running on Operating System has high dependence. Because environment of OS and standard libraries that supports are different. For those reason, Applications that perform the same function should be implemented in accordance with the new operating system. This results in a temporal and economic waste not only in subsequent maintenance of application but also in management. Even though, to solve this problem Cygwin or MinGW has been distributed, they do not support the portability of the application but provide a virtual environment and the tool. Therefore, in this paper, we design the wrapper format interface middleware using the POSIX and standard C library to support the application performing the same function on virtual environment and without code modification. The middleware can be selectively loading the API that is classified by basic and extend. This allows to managing the application size efficiently. Also, perform the comparative experiments and performance evaluation for application, on equipped with the Interface Middleware Linux, Unix, Windows and on Cygwin.

Implementation of a Parallel Viterbi Decoder for High Speed Multimedia Communications (멀티미디어 통신용 병렬 아키텍쳐 고속 비터비 복호기 설계)

  • Lee, Byeong-Cheol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.2
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    • pp.78-84
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    • 2000
  • The Viterbi decoders can be classified into serial Viterbi decoders and parallel Viterbi decoders. Parallel Viterbi decoders can handle higher data rates than serial Viterbl decoders. This paper designs and implements a fully parallel Viterbi decoder for high speed multimedia communications. For high speed operations, the ACS (Add-Compare-Select) module consisting of 64 PEs (Processing Elements) can compute one stage in a clock. In addition, the systolic away structure with 32 pipeline stages is developed for the TB (traceback) module. The implemented Viterbi decoder can support code rates 1/2, 2/3, 3/4, 5/6 and 7/8 using punctured codes. We have developed Verilog HDL models and performed logic synthesis. The 0.6 ${\mu}{\textrm}{m}$ SAMSUNG KG75000 SOG cell library has been used. The implemented Viterbi decoder has about 100,400 gates, and is running at 70 MHz in the worst case simulation.

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A Unified 3D Numerical Analysis of a Model Scramjet Engine with a Cavity Flame-Holder and Two Intake Side Walls (공동형 보염기를 갖는 모델 스크램제트 엔진의 흡입구 측면효과를 고려한 3차원 통합 유동해석)

  • Yeom, Hyo-Won;Kim, Sung-Jin;Sung, Hong-Gye;Kang, Sang-Hoon;Yang, Soo-Suk
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2009.11a
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    • pp.590-593
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    • 2009
  • To identify the detailed 3D flow characteristics of a model scramjet engine, a unified 3D numerical analysis was performed. The numerical domain of concern includes the entire flow path of the model scramjet engine extending from the intake to the nozzle exhaust. Turbulent models($k-{\omega}$ SST and low Reynolds number k-e with Sarkar model) were applied with comparison of experiment result. Intake side wall's effect on flow characteristics was analyzed in view points of flow quality at inlet duct and near the flame holder as well. The code is paralleled with multi-block feature using MPI(Massage Passing Interface) library to speed up the 3D calculation.

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Dose coefficients of mesh-type ICRP reference computational phantoms for external exposures of neutrons, protons, and helium ions

  • Yeom, Yeon Soo;Choi, Chansoo;Han, Haegin;Shin, Bangho;Nguyen, Thang Tat;Han, Min Cheol;Kim, Chan Hyeong;Lee, Choonsik
    • Nuclear Engineering and Technology
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    • v.52 no.7
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    • pp.1545-1556
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    • 2020
  • Recently, the International Commission on Radiological Protection (ICRP) has developed the Mesh-type Reference Computational Phantoms (MRCPs) for adult male and female to overcome the limitations of the current Voxel-type Reference Computational Phantoms (VRCPs) described in ICRP Publication 110 due to the limited voxel resolutions and the nature of voxel geometry. In our previous study, the MRCPs were used to calculate the dose coefficients (DCs) for idealized external exposures of photons and electrons. The present study is an extension of the previous study to include three additional particles (i.e., neutrons, protons, and helium ions) into the DC library by conducting Monte Carlo radiation transport simulations with the Geant4 code. The calculated MRCP DCs were compared with the reference DCs of ICRP Publication 116 which are based on the VRCPs, to appreciate the impact of the new reference phantoms on the DC values. We found that the MRCP DCs of organ/tissue doses and effective doses were generally similar to the ICRP-116 DCs for neutrons, whereas there were significant DC differences up to several orders of magnitude for protons and helium ions due mainly to the improved representation of the detailed anatomical structures in the MRCPs over the VRCPs.

A Design of LDPC Decoder for IEEE 802.11n Wireless LAN (IEEE 802.11n 무선 랜 표준용 LDPC 복호기 설계)

  • Jung, Sang-Hyeok;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.31-40
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    • 2010
  • This paper describes a LDPC decoder for IEEE 802.11n wireless LAN standard. The designed processor supports parity check matrix for block length of 1,944 and code rate of 1/2 in IEEE 802.11n standard. To reduce hardware complexity, the min-sum algorithm and layered decoding architecture are adopted. A novel memory reduction technique suitable for min-sum algorithm was devised, and our design reduces memory size to 25% of conventional method. The LDPC decoder processor synthesized with a $0.35-{\mu}m$ CMOS cell library has 200,400 gates and memory of 19,400 bits, and the estimated throughput is about 135 Mbps at 80 MHz@2.5v. The designed processor is verified by FPGA implementation and BER evaluation to validate the usefulness as a LDPC decoder.

New Low-Power and Small-Area Reed-Solomon Decoder (새로운 저전력 및 저면적 리드-솔로몬 복호기)

  • Baek, Jae-Hyun;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.96-103
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    • 2008
  • This paper proposes a new low-power and small-area Reed-Solomon decoder. The proposed Reed-Solomon decoder using a novel simplified form of the modified Euclid's algorithm can support low-hardware complexity and low-Power consumption for Reed-Solomon decoding. The simplified modified Euclid's algorithm uses new initial conditions and polynomial computations to reduce hardware complexity, and thus, the implemented architecture consisting of 3r basic cells has the lowest hardware complexity compared with existing modified Euclid's and Berlekamp-Massey architectures. The Reed-Solomon decoder has been synthesized using the $0.18{\mu}m$ Samsung standard cell library and operates at 370MHz and its data rate supports up to 2.9Gbps. For the (255, 239, 8) RS code, the gate counts of the simplified modified Euclid's architecture and the whole decoder excluding FIFO memory are only 20,166 and 40,136, respectively. Therefore, the proposed decoder can reduce the total gate count at least 5% compared with the conventional DCME decoder.

Real-Time Implementation of the EHSX Speech Coder Using a Floating Point DSP (부동 소수점 DSP를 이용한 4kbps EHSX 음성 부호화기의 실시간 구현)

  • 이인성;박동원;김정호
    • The Journal of the Acoustical Society of Korea
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    • v.23 no.5
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    • pp.420-427
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    • 2004
  • This paper presents real time implementation of 4kbps EHSX (Enhanced Harmonic Stochastic Excitation) speech coder that combines the harmonic vector excitation coding with time-separated transition coding. The harmonic vector excitation coding uses the harmonic excitation coding for voiced frames and used the vector excitation coding with the structure of analysis-by-synthesis for unvoiced frames, respectively. For transition frames mixed with voiced and unvoiced signal, we use the time-separated transition coding. In this paper. we present the optimization methods of implementation speech coder on the EMS320C6701/sup (R)/ DSP. To reduce the complex for real-time implementation. we perform the optimization method in algorithm by replacing the complex sinusoidal synthesis method with IFFT. and we apply fully pipelines hand assembly coding after converting it from floating source to fixed source. To generate a more efficient code. we also make use or the available EMS320C6701/sup (R)/ resources such as Fastest67x library and memory organization.