• Title/Summary/Keyword: Closed-Loop Type Oscillator

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Design of a Ultra Miniaturized Voltage Tuned Oscillator Using LTCC Artificial Dielectric Reson (LTCC 의사 유전체 공진기를 이용한 초소형 전압제어발진기 설계)

  • Heo, Yun-Seong;Oh, Hyun-Seok;Jeong, Hae-Chang;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.5
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    • pp.613-623
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    • 2012
  • In this paper, we present an ultra miniaturized voltage tuned oscillator, with HMIC-type amplifier and phase shifter, using LTCC artificial dielectric resonator. ADR which consists of periodic conductor patterns and stacked layers has a smaller size than a dielectric resonator. The design specification of ADR is obtained from the design goal of oscillator. The structure of the ADR with a stacked circular disk type is chosen. The resonance characteristic, physical dimension and stack number are analyzed. For miniaturization of ADRO, the ADR is internally implemented at the upper part of the LTCC substrate and the other circuits, which are amplifier and phase shifter are integrated at the bottom side respectively. The fabricated ADRO has ultra small size of $13{\times}13{\times}3mm^3$ and is a SMT type. The designed ADRO satisfies the open-loop oscillation condition at the design frequency. As a results, the oscillation frequency range is 2.025~2.108 GHz at a tuning voltage of 0~5 V. The phase noise is $-109{\pm}4$ dBc/Hz at 100 kHz offset frequency and the power is $6.8{\pm}0.2$ dBm. The power frequency tuning normalized figure of merit is -30.88 dB.

A Design of a 5 GHz Low Phase Noise Voltage Tuned Dielectric Resonator Oscillator Using Loop Group Delay (루프 군지연을 이용한 저위상 잡음 5 GHz 전압제어 유전체 공진기 발진기 설계)

  • Son, Beom-Ik;Jeong, Hae-Chang;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.3
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    • pp.269-281
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    • 2014
  • In this paper, a systematic design of a low phase noise voltage-tuned dielectric resonator oscillator(VTDRO) using loop group delay is proposed. Designed VTDRO is closed-loop type and consists of a cascade connection of a resonator, phase shifter, and amplifier. Firstly, a reference VTDRO is fabricated and its phase noise and electrical frequency tuning range are measured. Both the phase noise and electrical frequency tuning range depend on the loop group delay. Then, a required value of loop group delay for a new VTDRO with a low phase noise can be systematically computed. In addition, its phase noise and electrical frequency tuning range can be theoretically estimated using those obtained from the measurement of the reference VTDRO. When the loop group delay increases, the phase noise decreases and the electrical frequency tuning range also decreases. The former predominantly depends on the resonator structure. Therefore we propose a systematic design procedure of a resonator with high group delay characteristics. The measured loop group delay of the new VTDRO is about 700 nsec. The measured phase noise of the new VTDRO show a state-of-the-art performance of 154.5 dBc/Hz at 100 kHz frequency offset and electrical frequency tuning range of 448 kHz for a voltage change of 0~10V. The oscillation power is about 4.39 dBm.

Hybrid Type Structure Design and DLT-Replacement Circuit of the High-Speed Frequency Synthesizer (고속 스위칭 동작의 주파수 합성기를 위한 하이브리드형 구조 설계와 DLT 대체 회로 연구)

  • Lee Hun-Hee;Heo Keun-Jae;Jung Rag-Gyu;Ryu Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.12 s.91
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    • pp.1161-1167
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    • 2004
  • The conventional PLL(phase locked loop) frequency synthesizer takes a long switching time because of the inherent closed-loop structure. The digital hybrid PLL(DH-PLL) which includes the open-loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates in high speed, but the hardware complexity and power consumption are the serious problem because the DLT(digital look-up table) is usually implemented by the ROM which contains the transfer characteristic of VCO(voltage controlled oscillator). This paper proposes a new DH-PLL using a very simple DLT-replacement digital logic instead of the complex ROM-type DLT. Also, a timing synchronization circuit for the very small over-shoot and shorter settling time is designed for the ultra fast switching speed at every frequency synthesis. The hardware complexity gets decreased to about $28\%,$ as compared with the conventional DH-PLL. The high speed switching characteristic of the frequency synthesis process can be verified by the computer simulation and the circuit implementation.

Design of a Low Phase Noise Vt-DRO Based on Improvement of Dielectric Resonator Coupling Structure (유전체 공진기 결합 구조 개선을 통한 저위상 잡음 전압 제어 유전체 공진기 발진기 설계)

  • Son, Beom-Ik;Jeong, Hae-Chang;Lee, Seok-Jeong;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.6
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    • pp.691-699
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    • 2012
  • In this paper, we present a Vt-DRO with a low phase noise, which is achieved by improving the coupling structure between the dielectric resonator and microstrip line. The Vt-DRO is a closed-loop type and is composed of 3 blocks; dielectric resonator, phase shifter, and amplifier. We propose a mathematical estimation method of phase noise, using the group delay of the resonator. By modifying the coupling structure between the dielectric resonator and microstrip line, we achieved a group delay of 53 nsec. For convenience of measurement, wafer probes were inserted at each stage to measure the S-parameters of each block. The measured S-parameter of the Vt-DRO satisfies the open-loop oscillation condition. The Vt-DRO was implemented by connecting the input and output of the designed open-loop to form a closed-loop. As a result, the phase noise of the Vt-DRO was measured as -132.7 dBc/Hz(@ 100 kHz offset frequency), which approximates the predicted result at the center frequency of 5.3 GHz. The tuning-range of the Vt-DRO is about 5 MHz for tuning voltage of 0~10 V and the power is 4.5 dBm. PFTN-FOM is -31 dBm.

A study on vibration characteristics and tuning of smart cantilevered beams featuring an electo-rheological fulid

  • Park, S.B.;Cheong, C.C.;Suh, M.S.
    • Journal of the Korean Society for Precision Engineering
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    • v.10 no.1
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    • pp.134-141
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    • 1993
  • Electro-Rheological(ER) fluids undergo a phase-change when subjected to an external electic field, and this phase-change typically manifests itself as a many-order-of-magnitude change in the rheological behavior. This phenomenon permits the global stiffness and energy- dissipation properties of the beam structures to be tuned in order to synthesize the desired vibration characteristics. This paper reports on a proof-of-concept experimental investigation focussed on evaluation the vibration properties of hollow cantilevered beams filled with an ER fluid. and consequently deriving an empirical model for predicting field-dependent vibration characteristics. A hydrous-based ER fluid consisting of corn starch and silicone oil is employed. The beams are considered to be uniform viscoelastic materials and modelled as a viscously-damped harmonic oscillator. Natural frequency, damping ratio and elastic modulus are evaluated with respect to the electric field and compared among three different beams: two types of different volume fraction of ER fluid and one type of different particle concentration of ER fluid by weight. Transient and forced vibration responses are examined in time domain to demonstrate the validity of the proposed empirical model and to evaluate the feasibility of using the ERfluid as an actuator in a closed-loop control system.

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