• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.11A
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• pp.1073-1080
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• 2005

In spite of many advantages of Meteor Burst Communications(MBC) on its transmission channel, the fact that its duty rate is less than 10 percents is a considerable deficiency of MBC. To overcome with this deficiency without paying large cost, we use a direct sequence(DS) simple reception system. This method doesn't need to add the components for acquisition or tracking the signal so that it keeps the cost efficiency of the MBC. But it has a disadvantage that its duty rate shows a large decline by noise. For this problem, we adopt the proposed system applying a positive feedback circuit. The improvement by this method is more significant when the received signal is weak. Simulation results show as tl is l00ms, then the burst length would be increased by $35\%$ when the initial value of the received signal power increases by 3 dB, t2 is 135ms. If the power increases by 6dB the burst length would be 170ms thus increased by $70\%$, which shows a great enhancement. Suppose now that tl is 50ms and the power is increased by 3dB, then t2 would be increased by $70\%$ to 85ms, and increasing the power by 6dB it would be increased by $130\%$ to 115ms.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.9
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• pp.936-943
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• 2013

This work presents the design and measured results of the single channel automotive radar system for 76.5~77 GHz long range FMCW radar applications. The transmitter uses a commercial GaAs monolithic microwave integrated circuit(MMIC) and the receiver uses the down converter designed using 65 nm CMOS process. The output power of the transmitter is 10 dBm. The down converter chip can operate at low LO power as -8 dBm which is easily supplied from the transmitter output using a coupled line coupler. All MMICs are mounted on an aluminum jig which embeds the WR-10 waveguide. A microstrip to waveguide transition is designed to feed the embedded waveguide and finally high gain horn antennas. The overall size of the fabricated radar system is $80mm{\times}61mm{\times}21mm$. The radar system achieved an output power of 10 dBm, phase noise of -94 dBc/Hz at 1 MHz offset and a conversion gain of 12 dB.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.3
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• pp.258-268
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• 2001

The compression method is necessarily used to send the high quality moving picture that contains a number of data in image processing. In the field of moving picture compression method, the motion estimation algorithm is used to reduce the temporal redundancy. Block matching algorithm to be usually used is distinguished partial search algorithm with full search algorithm. Full search algorithm be used in this paper is the method to compare the reference block with entire block in the search window. It is very efficient and has simple data flow and control circuit. But the bigger the search window, the larger hardware size, because large computational operation is needed. In this paper, we design the full search block matching motion estimator. Using the DCT DC values, we decide luminance. And we apply 3 bit compare-selector using bit plane to I(Intra coded) picture, not using 8 bit luminance signals. Also it is suggested that use the same selective bit for the P(Predicted coded) and B(Bidirectional coded) picture. We compare based full search method with PSNR(Peak Signal to Noise Ratio) for C language modeling. Its condition is the reference block 8$\times$8, the search window 24$\times$24 and 352$\times$288 gray scale standard video images. The result has small difference that we cannot see. And we design the suggested motion estimator that hardware size is proved to reduce 38.3％ for structure I and 30.7％ for structure II. The memory is proved to reduce 31.3％ for structure I and II.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.7-13
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• 2011

This paper presents a Time-to-Digital Converter which is a key block of an All-Digital Phase Locked Loop. In this work, a Vernier Delay Line is added in a conventional Gated Ring Oscillator, so it could get multi-phases and a high resolution. The Gated Ring Oscillator uses 7 unit delay cell, the Vernier Delay Line is used each delay cell. So proposed Time-to-Digital Converter uses total 21 phases. This Time-to-Digital Converter circuit is designed and laid out in $0.13{\mu}m$ 1P-6M CMOS technology. The proposed Time-to-Digital Converter achieves 26ps resolution, maximum input signal frequency is 100MHz and the digital output of proposed Time-to-Digital Converter are 8-bits. The proposed TDC detect 5ns phase difference between Start and Stop signal. A power consumption is 8.4~12.7mW depending on Enable signal width.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.69-76
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• 2008

This work proposes a 12b 1kS/s 65uA 0.35um CMOS algorithmic ADC for sensor interface applications such as accelerometers and gyro sensors requiring high resolution, ultra-low power, and small size simultaneously. The proposed ADC is based on an algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. Two versions of ADCs are fabricated with a conventional open-loop sampling scheme and a closed-loop sampling scheme to investigate the effects of offset and 1/f noise during dynamic operation. Switched bias power-reduction techniques and bias circuit sharing reduce the power consumption of amplifiers in the SHA and MDAC. The current and voltage references are implemented on chip with optional of-chip voltage references for low-power SoC applications. The prototype ADC in a 0.35um 2P4M CMOS technology demonstrates a measured DNL and INL within 0.78LSB and 2.24LSB, and shows a maximum SNDR and SFDR of 60dB and 70dB in versionl, and 63dB and 75dB in version2 at 1kS/s. The versionl and version2 ADCs with an active die area of $0.78mm^2$ and $0.81mm^2$ consume 0.163mW and 0.176mW at 1kS/s and 2.5V, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.7
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• pp.26-36
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• 2014

The needs of active phased arrays antenna system is getting more increased for IMT-Advanced system efficiency. The active phased array structure consists of lots of small transceivers and radiation elements to increase system efficiency. The minimized module of high efficiency transceiver is key for system implementation. The power amplifier of transmitter decides efficiency of base-station. In this paper, we design and implement minimized module of high efficiency transceiver for IMT-Advanced active phased array system. The temperature compensation circuit of transceiver reduces gain error and the analog pre-distorter of linearizer reduces implemented size. For minimal size and high efficiency, the implented power amplifier consist of GaN MMIC Doherty structure. The size of implemented module is $40mm{\times}90mm{\times}50mm$ and output power is 47.65 dBm at LTE band 7. The efficiency of power amplifier is 40.7% efficiency and ACLR compensation of linearizer is above 12dB at operating power level, 37dBm. The noise figure of transceiver is under 1.28 dB and amplitude error and phase error on 6 bit control is 0.38 dB and 2.77 degree respectively.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.236-244
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• 2003

In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.5
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• pp.613-623
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• 2012

In this paper, we present an ultra miniaturized voltage tuned oscillator, with HMIC-type amplifier and phase shifter, using LTCC artificial dielectric resonator. ADR which consists of periodic conductor patterns and stacked layers has a smaller size than a dielectric resonator. The design specification of ADR is obtained from the design goal of oscillator. The structure of the ADR with a stacked circular disk type is chosen. The resonance characteristic, physical dimension and stack number are analyzed. For miniaturization of ADRO, the ADR is internally implemented at the upper part of the LTCC substrate and the other circuits, which are amplifier and phase shifter are integrated at the bottom side respectively. The fabricated ADRO has ultra small size of $13{\times}13{\times}3mm^3$ and is a SMT type. The designed ADRO satisfies the open-loop oscillation condition at the design frequency. As a results, the oscillation frequency range is 2.025~2.108 GHz at a tuning voltage of 0~5 V. The phase noise is $-109{\pm}4$ dBc/Hz at 100 kHz offset frequency and the power is $6.8{\pm}0.2$ dBm. The power frequency tuning normalized figure of merit is -30.88 dB.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.49 no.11
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• pp.893-900
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• 2021

In this study, air density in a narrow test section is measured using a laser absorption spectroscopy system that detects oxygen absorption lines. An absorption line pair at 13156.28 and 13156.62 cm^-1 are detected. A gas chamber with a height of 40 mm is used as a narrow test section. A triangular spiral-shaped laser path is applied in the gas chamber to amplify absorption strength by extending laser beam path length. A well-known logarithm amplifier and a secondary amplifier are used to electrically amplify absorption signal. An AC-coupling is applied after the logarithm amplifier for signal saturation prevention and noise suppression. Procedure of calculating spectral absorbance from output signal is introduced considering the logarithm amplifier circuit configuration. Air density is determined by fitting the theoretically calculated spectral absorbance to the measured spectral absorbance. Test conditions with room temperature and a pressure range of 10~100 kPa are made in a gas chamber using a Bourdon pressure gauge. It is confirmed that air density in a narrow test section can be measured within a 16 % error through absorption signal amplification using a triangular spiral-shaped beam path and a logarithm amplifier.

• Journal of IKEEE
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• v.25 no.3
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• pp.485-492
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• 2021

In this paper, we propose the development of a defect inspection system for polygonal containers. Embedded board consists of main part, communication part, input/output part, etc. The main unit is a main arithmetic unit, and the operating system that drives the embedded board is ported to control input/output for external communication, sensors and control. The input/output unit converts the electrical signals of the sensors installed in the field into digital and transmits them to the main module and plays the role of controlling the external stepper motor. The communication unit performs a role of setting an image capturing camera trigger and driving setting of the control device. The input/output unit converts the electrical signals of the control switches and sensors into digital and transmits them to the main module. In the input circuit for receiving the pulse input related to the operation mode, etc., a photocoupler is designed for each input port in order to minimize the interference of external noise. In order to objectively evaluate the accuracy of the development of the proposed polygonal container defect inspection system, comparison with other machine vision inspection systems is required, but it is impossible because there is currently no machine vision inspection system for polygonal containers. Therefore, by measuring the operation timing with an oscilloscope, it was confirmed that waveforms such as Test Time, One Angle Pulse Value, One Pulse Time, Camera Trigger Pulse, and BLU brightness control were accurately output.