• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.2
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• pp.59-64
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• 2004

In this paper, a Cold PHEMT equivalent circuit was proposed, and it is applied to extract extrinsic resistances. By using the proposed Cold PHEMT equivalent circuit, the variation of impedance with frequency and bias were mainly emphasized. Especially, the convergence of impedance with frequency and the change in impedance with bias were carefully analyzed, which may be used for fast extraction of extrinsic resistances. The proposed extraction method demonstrated improving of small signal model accuracy than conventional extraction method.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.3
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• pp.26-34
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• 1999

A new silicon-based IC interconnect transmission line parameter extraction methodology is presented and experimentally examined. Unlike the PCB or MCM interconnects, a dominant energy propagation mode in the silicon-based IC interconnects is not quasi-TEM but slow wave mode(SWM). The transmission line parameters are extracted taking the silicon substrate effect (i.e., slow wave mode) into account. The capacitances are calculated considering silicon substrate surface as a ground. Whereas the inductances are calculated by using an effective dielectric constant. In order to verify the proposed method, test patterns were designed. Experimental data have agreement within 10%. Further, crosstalk noise simulation shows excellent agreements with the measurements which are performed with high-speed time domain measurement ( i.e., TDR/TDT measurements) for test pattern, while RC model or RLC model without silicon substrate effect show about 20~25% underestimation error.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.796-800
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• 2004

The main research on this paper is to model on-chip inductor in digital CMOS technology by using the foundry parameters and the physical structure. The s-parameters of a spiral inductor are extracted from the modeled equivalent circuit and then compared to the results obtained from HFSS. The structure and material of the inductor used for modeling in this work is identical with those of the inductor fabricated by CMOS process. To show why the modeled inductor instead of ideal inductor should be used to design a RF system, we designed dual band RF front-end receiver and then compared the results between when using the ideal inductor and using the modeled inductor.

• Journal of Power Electronics
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• v.11 no.2
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• pp.237-243
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• 2011

Lithium batteries are widely used in mobile electronic devices due to their higher voltage and energy density, lighter weight and longer life cycle when compared to other secondary batteries. In particular, a high demand for lithium batteries is expected for electric cars. In the case of the lithium batteries used in electric cars, driving distance must be calculated accurately and discharging should not be done below a level that makes it impossible to crank. Therefore, accurate information on the state-of-charge (SOC) becomes an essential element for reliable driving. In this paper, a novel method for estimating the SOC of lithium polymer batteries using AC impedance is proposed. In the proposed method, the parameters are extracted by fitting the measured impedance spectrum on an equivalent impedance model and the variation in the parameter values at each SOC is used to estimate the SOC. Also to shorten the long length of time required for the measurement of the impedance spectrum, a novel method is proposed that can extract the equivalent impedance model parameters of lithium polymer batteries with the impedance measured at only two specific frequencies. Experiments are conducted on lithium polymer batteries, with similar capacities, made by different manufacturers to prove the validity of the proposed method.

• Journal of Applied Reliability
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• v.18 no.3
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• pp.229-239
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• 2018

Purpose: There is a difficulty in Environmental Stress Screening (ESS) test design for weapon system's electrical/electronic components/products in small and medium-sized enterprises. To overcome this difficulty, I propose an easy ESS test design approach algorithm that is optimized with only one environment tolerance design information parameter (${\Delta}T$). Methods: To propose the mass production weapon system ESS test design for cost-effective optimization, I define an optimum cost-effective mathematical model ESS test algorithm model based on modified MIL-HDBK-344, MIL-HDBK-2164 and DTIC Technical Report 2477. Results: I clearly confirmed and obtained the quantitative data of ESS effectiveness and cost optimization along our ESS test design algorithm through the practical case. I will expect that proposed ESS test method is used for ESS process improvement activity and cost cutting of mass production weapon system manufacturing cost in small and medium-sized enterprises. Conclusion: In order to compare the effectiveness of the proposed algorithm, I compared the effectiveness of the existing ESS test and the proposed algorithm ESS test based on the existing weapon system circuit card assembly for signal processing. As a result of the comparison, it was confirmed that the test time was reduced from 573.0 minutes to 517.2minutes (9.74% less than existing test time).

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.8
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• pp.46-52
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• 1994

DC and AC current crowding effects for microwave and high speed bipolar transistors are investigated in detail using a new and accurate measurement technique based on Z-parameter equationa. Using the new measurement technique dc and ac current crowding effects have been explained clearly in bipolar junction transistors. To model ac crowding effects a capacitive element defined as base capacitance (C$_b$), called ac crowding capacitance is added to base resistance in parallel thereby treating the base resistance(R$_b$) as base impedance Z$_b$. It is shown that base resistance decreases with increasing collector current due to dc current crowding and approaches to a certain limited value at high collector current due to current crowding and approaches to a certain limited value at high collector currents regardless of the emitter size. It is also observed that due to ac current crowding base capacitance increases with increasing collector current. To quantigy the ac crowding effects for SPICE circuit simulation the base capacitance(C$_b$) including the base depletion and diffusion components has been modeled with an analytical expression form.

• Journal of Power Electronics
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• v.16 no.1
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• pp.238-248
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• 2016

The state-of-charge (SOC) and state-of-health (SOH) estimation of batteries play important roles in managing batteries for automotive applications. However, an accurate state estimation of a battery is difficult to achieve because of certain factors, such as measurement noise, highly nonlinear characteristics, strong hysteresis phenomenon, and diffusion effect of batteries. In certain vehicular applications, such as idle stop-start systems (ISSs), significant errors in SOC/SOH estimation may lead to a failure in restarting a combustion engine after the shut-off period of the engine when the vehicle is at rest, such as at a traffic light. In this paper, a dual extended Kalman filter algorithm with a dynamic equivalent circuit model of a lead-acid battery is proposed to deal with this problem. The proposed algorithm adopts a battery model by taking into account the hysteresis phenomenon, diffusion effect, and parameter variations for accurate state estimations of the battery. The validity of the proposed algorithm is verified through experiments by using an absorbed glass mat valve-regulated lead-acid battery and a battery sensor cable for commercial ISS vehicles.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.2
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• pp.132-139
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• 2002

This paper describes a supply voltage detector and SRAM write driver circuit which dissipates small power. The supply voltage detector generates high signal when supply voltage is higher than reference voltage, but low signal when supply voltage is lower than reference voltage. The write driver utilizes two same-sized drivers to reduce operating current in the write cycle. In the case of lower supply voltage comparing to Vcc, both drivers are active the same as conventional write driver, while in the case of high Vcc only one of two drivers are active so as to deliver the half of the current. As a result of simulation using 0.6${\mu}{\textrm}{m}$ 3.3v/5v, CMOS model parameter, the proposed SRAM scheme shows a 22.6% power reduction and 12.7% PDP reduction at Vcc=3.3V, compared to the conventional one.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.761-764
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• 2007

This paper addresses the analysis and the design optimization of differential interconnects for Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and πace space in differential flexible printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, time-domain transient simulations, and S-parameter simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.10
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• pp.1005-1016
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• 2002

In this paper, a 2 GHz tapered shape of multiport power divider/combiner modified from the model published by [10] and adopted PBG(Photonic Band Gap) structure is proposed. Parameters determining electrical property of the circuit structure have been analyzed by HFSS simulation. For input matching, balance of output signals and phase linearity at each output port, one circular hole has been etched out on the circuit surface. 1:2 and 1:3 power dividers/combiners designed by this study have been compared with the same circuits designed by the method of [10] in terms of S-parameters. As a result, it has been found that tile modified structure and PBG of power divider/combiner have improved return loss more than 20 dB and another 18 dB. respectively, at 2 GHz.