• Proceedings of the KSME Conference
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• 2007.05a
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• pp.1673-1678
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• 2007

The use of flip-chip type electronic package offers numerous advantages such as reduced thickness, improved environmental compatibility, and downed cost. Despite numerous benefits, flip-chip type packages bare several reliability problems. The most critical issue among them is their electrical performance deterioration upon consecutive thermal cycles attributed to gradual delamination growth through chip and adhesive film interface induced by CTE mismatch driven shear and peel stresses. The electronic package in use is heated continuously by itself. When the crack at a weak site of the electronic package occurs, thermal deformationon the chip side is changed. Therefore, we can measure these micro deformations by using Moire interferometry and find out the crack length.

• Proceedings of the KSME Conference
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• 2007.05b
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• pp.2449-2452
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• 2007

Hot spots on thin wafers of IC packages are becoming important issues in thermal and electrical engineering fields. To investigate these hot spots, we developed a Diode Temperature Sensor Array (DTSA) that consists of an array of 32 ${\times}$32 diodes (1,024 diodes) in a 8 mm ${\times}$ 8 mm surface area. To know specifically the hot spot temperature which is affected by the chip thickness and a generated power, we made the DTSA chips, which have 21.5 ${\mu}m$, 31 ${\mu}m$, 42 ${\mu}m$, 100 ${\mu}m$, 200 ${\mu}m$, and 400 ${\mu}m$ thickness using the CMP process. And we conducted the experiment using various heater power conditions (0.2 W, 0.3 W, 0.4 W, 0.5 W). In order to validate experimental results, we performed a numerical simulation. Errors between experimental results and numerical data are less than 4%. Finally, we proposed a correlation for the hot spot temperature as a function of the generated power and the wafer thickness based on the results of the experiment. This correlation can give an easy estimate of the hot spot temperature for flip chip packaging when the wafer thickness and the generated power are given.

• Journal of Magnetics
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• v.13 no.2
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• pp.37-42
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• 2008

In this paper, design parameters of high Q (> 50), high current inductor for on-chip power module were optimized by 4 Xs 3 Ys DOE (Design of Experiment). Coil spacing, coil thickness, ferrite thickness, and permeability were assigned to Xs, and inductance (L) and Q factor at 10 MHz, and resonance frequency ($f_r$) were determined Ys. Effects of each X on the Ys were demonstrated and explained using known inductor theory. Multiple response optimizations were accomplished by three derived regression equations on the Ys. As a result, L of 125 nH, Q factor of 197.5, and $f_r$ of 316.3 MHz were obtained with coil space of $127\;{\mu}m$, Cu thickness of $67.8\;{\mu}m$, ferrite thickness of $130.3\;{\mu}m$, and permeability 156.5. Loss tan ${\delta}=0$ was assumed for the estimation. Accordingly, Q factor of about 60 is expected at tan ${\delta}=0.02$.

• Design & Manufacturing
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• v.13 no.4
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• pp.10-16
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• 2019

Semiconductor chip is bonded to the substrate by melting solder bumps. In general, the chip bonding is applied by a Reflow process or a Thermo-Compression(TC) bonding process. In this paper, we introduce a Laser Assisted Thermo-Compression bonding (LATCB) process to improve the anxiety of the existing process(Reflow, TC bonding). In the LATCB process, the chip is bonded to the substrate by irradiating a laser with a uniform energy density in the same area as the chip to melt only the solder bumps and press the chip with a Transparent Compression Module (TCM). The TCM consists of a fused silica header for penetrating the laser and pressurizing the chip, and a piezoelectric actuator (P.A.) coupled to both ends of the header for micro displacement control of the header. In addition, TCM is a structure that can pressurize the chip and deliver it to the chip and solder bumps without losing the energy of the laser. Fused silica, which is brittle, is vulnerable to deformation, so the header may be damaged when an external force is applied for pressurization or a displacement differenced is caused by piezoelectric actuators at both ends. On the other hand, in order to avoid interference between the header and the adjacent chip when pressing the chip using the TCM, the header has a notch at the bottom, and breakage due to stress concentration of the notch is expected. In this study, the thickness and notch length that the header does not break when the external force (500 N) is applied to both ends of the header are optimized using structural analysis and Coulomb-Mohr failure theory. In addition, the maximum displacement difference of the P.A.s at both ends where no break occurred in the header was derived. As a result, the thickness of the header is 11 mm, and the maximum displacement difference between both ends is 8 um.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.11
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• pp.38-45
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• 2004

This paper discusses the minimum cutting thickness with a continuous chip in sub-micrometer order precision diamond cutting. An ultra precision cutting model is proposed, in which the tool edge radius and the friction coefficient are the principal factors determining the minimum cutting thickness. The experimental results verify the proposed model and provide various supporting evidence. In order to reduce the minimum cutting thickness a vibration cutting method is applied, and the effects are investigated through a series of experiments under the same conditions as conventional cutting method.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.1
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• pp.1-10
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• 2018

Recently, there has been rapid development in the field of flexible electronic devices, such as organic light emitting diodes (OLEDs), organic solar cells and flexible sensors. Encapsulation process is added to protect the flexible electronic devices from exposure to oxygen and moisture in the air. Using numerical simulation, we investigated the effects of the encapsulation layer on mechanical stability of the silicon chip, especially the fracture performance of center crack in multi-layer package for various loading condition. The multi-layer package is categorized in two type - a wide chip model in which the chip has a large width and encapsulation layer covers only the chip, and a narrow chip model in which the chip covers both the substrate and the chip with smaller width than the substrate. In the wide chip model where the external load acts directly on the chip, the encapsulation layer with high stiffness enhanced the crack resistance of the film chip as the thickness of the encapsulation layer increased regardless of loading conditions. In contrast, the encapsulation layer with high stiffness reduced the crack resistance of the film chip in the narrow chip model for the case of external tensile strain loading. This is because the external load is transferred to the chip through the encapsulation layer and the small load acts on the chip for the weak encapsulation layer in the narrow chip model. When the bending moment acts on the narrow model, thin encapsulation layer and thick encapsulation layer show the opposite results since the neutral axis is moving toward the chip with a crack and load acting on chip decreases consequently as the thickness of encapsulation layer increases. The present study is expected to provide practical design guidance to enhance the durability and fracture performance of the silicon chip in the multilayer package with encapsulation layer.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.4
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• pp.57-64
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• 1995

Three models for the transformation of ferrite chip noise filter that has jagged type of electrode into cylinderical ferrite beadfilter were presented. The properties of filters were also calculated based on the proposed models. The measured properties of ferrite chip noise filter with jagged-type electrode fabricated with Ag electrode and Ni-Zn ferrite revealed that the model 3 was the best one to describe the behavior of filters. In particular, the calculated values of model 3 agreed well with measured ones as functions of electrode patterns and chip thickness. The present study showed that the properties of fiters could be designed by theoretical models and fabricated with required characteristics.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1992.04a
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• pp.89-93
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• 1992

We experimented cutting characteristics-cutting force, behavior of chip, surface roughness-under low temperature, which generated by liquid nitrogen(77K). The results obtained are as follows; 1) The workpice is became to-195 .deg. C in 5, minutes, and in cooled cutting, cutting force bycooled workpices is stronger than normal temperature condition. Chip thickness is decreasing comparative toN.C and shear angle in shear plane is in creasing. 2) Chip formation becomes long or short tubular chips in turning SXM440, SNCM21 steel, when cutting speed is low and cutting temperatre is cooled condition, but in the STS304 steel the variation of c formations isn't known to. 3) In C.C, surface roughness of workpices is better than N.C and found to make more the crat wearthan N.C 4) It is possible to detect the behavior of chip by monitoring the maximum amplitude of gai value of cutting force.

• Journal of Forest and Environmental Science
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• v.25 no.1
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• pp.75-84
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• 2009

This study was conducted to investigate the physical properties of wood chip for fuel processing with woody biomass. Seven species are selected and processed for testing physical properties by 3-type wood chippers which are commonly used in Korea. Wood chips produced by self-propelled drum chipper and fixed type wood chipper equipped with separator were uniform in size and shape. It was shown that the bulk density of produced wood chips was decreased with increasing the wood chip layer thickness, and oak chips prepared by self-propelled drum chipper and fixed type wood chipper showed the highest bulk density.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.13 no.2
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• pp.17-24
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• 2004

In end milling process, undeformed chip thickness and cutting forces vary periodically with phase change of the tool. Recently, a model has been proposed to simulate the shear and friction characteristics of an up-end milling process in terms of the equivalent oblique cutting to this. In the current study, a down-end milling process has been replaced with the equivalent oblique cutting process. And shear and tool-chip friction characteristics variation of SM45C steel has been studied using the end-mills of different helix angles. The specific shear and friction energy consumed with helix angle of $50^{\circ}$ is somewhat larger than those of$30^{\circ}$ and $40^{\circ}$. The specific shear energy consumed is about 76-77% of the specific cutting energy regardless the helix angles.