• Journal of Korea Multimedia Society
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• v.4 no.3
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• pp.257-269
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• 2001

Because of increasing number of integrated circuit, there is many tries of making chip of neural network and some chip is exit. but this is not prefer because YLSI technology can't support so large hardware. So imitation of whole system of neural network is more prefer. There is common procedure in signal processing as in the neural network and pattern recognition. That is multiplication of large amount of signal and reading LUT. This is identical with some operation of MLP, and need iterative and large amount of calculation, so if we make this part with hardware, overall system's velocity will be improved. So in this paper, we design neutral network, not neuron which can be used to many other fields. We realize this part by following separated bits addition method, and it can be appled in the real time parallel process processing.

• Journal of IKEEE
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• v.3 no.2 s.5
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• pp.186-195
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• 1999

In this paper, the RF-modules composed of front-end, frequency synthesizer, modulator/demodulator and power control multi channel WLL personal system for W-CDMA using 10 [MHz] RF channel bandwidth has been implemented and considered. The measured transmission power is 250 [mW] which is very close to the required value. The measured flatness of power at the final output stage is ${\pm}1.5[dB]$ over the required bandwidth of the receiver. In addition, it is found that the chip rate transmitting spread signal is set to 8.192 [MHz], the required rate. The frequencies of RF_LO signal and LO signal of the modulator and the demodulator measured by a frequency synthesizer are satisfied with design requirements. The operating range of the receiving strength signal indicator and AGC units shows 60 [dB] respectively. Also the measured phasor diagram and eye pattern for deciding the RF modules compatible with baseband digital signal processing part are shown good results.

• Journal of Information Processing Systems
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• v.8 no.2
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• pp.347-358
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• 2012

Recently, security researches have been processed on the method to cover a broader range of hacking attacks at the low level in the perspective of hardware. This system security applies not only to individuals' computer systems but also to cloud environments. "Cloud" concerns operations on the web. Therefore it is exposed to a lot of risks and the security of its spaces where data is stored is vulnerable. Accordingly, in order to reduce threat factors to security, the TCG proposed a highly reliable platform based on a semiconductor-chip, the TPM. However, there have been no technologies up to date that enables a real-time visual monitoring of the security status of a PC that is operated based on the TPM. And the TPB has provided the function in a visual method to monitor system status and resources only for the system behavior of a single host. Therefore, this paper will propose a m-TMS (Mobile Trusted Monitoring System) that monitors the trusted state of a computing environment in which a TPM chip-based TPB is mounted and the current status of its system resources in a mobile device environment resulting from the development of network service technology. The m-TMS is provided to users so that system resources of CPU, RAM, and process, which are the monitoring objects in a computer system, may be monitored. Moreover, converting and detouring single entities like a PC or target addresses, which are attack pattern methods that pose a threat to the computer system security, are combined. The branch instruction trace function is monitored using a BiT Profiling tool through which processes attacked or those suspected of being attacked may be traced, thereby enabling users to actively respond.

• Journal of Navigation and Port Research
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• v.32 no.10
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• pp.805-811
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• 2008

This paper presents a design of RFID(Radio Frequency Identification) tag antenna which is available for a vehicle's side mirror and directivity characteristics by mr body. The proposed Tag antenna is designed symmetrical structure to improve the broad bandwidth characteristic and the readable range. A proposed tag antenna($30\;mm{\times}24\;mm{\times}1\;mm$) has resonant frequency at 910 MHz and bandwidth is 780 MHz ($540\;MHz{\sim}1320\;MHz$). The chip impedance is the 16 - $j131\;{\Omega}$ and the complex conjugate impedance of commercial chip has been used for tag antenna design. In order to evaluate effects of tag antenna for side view mirror's permittivity as well as car body(conductor), radiation pattern characteristics and readable range have been calculated and measured. The optimized position for a vehicle's RFID system has been observed in the inside of a side mirror and the calculated results show good agreement with the measured results.

• Tribology and Lubricants
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• v.39 no.5
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• pp.197-202
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• 2023

Recently, research on experimental and analytical techniques utilizing microfluidic devices has been pursued. For example, lab-on-a-chip devices that integrate micro-devices onto a single chip for processing small sample quantities have gained significant attention. However, during sample preparation, unnecessary gases can be introduced into the internal channels, thus, impeding device flow and compromising specific function efficiency, including that of analysis and separation. Several methods have been proposed to mitigate this issue, however, many involve cumbersome procedures or suffer from complexities owing to intricate structures. Recently, some approaches have been introduced that utilize hydrophobic device structures to remove gases within channels. In such cases, the permeability of gases passing through the structure becomes a crucial performance factor. In this study, a method involving the deposition and sintering of diluted Ag-ink onto a silicon wafer surface is presented. This is followed by unstructured nano-pattern creation using a Metal Assisted Chemical Etching (MACE) process, which yields a nanostructured surface with unstructured pillar shapes. Subsequently, gas permeability in the spaces formed by these surface structures is investigated. This is achieved by experiments conducted to incorporate a pressure chamber and measure gas permeability. Trends are subsequently analyzed by comparing the results with existing theories. Finally, it can be confirmed that the significance of this study primarily lies in its capability to effectively evaluate gas permeability through unstructured pillar-like nanostructures, thus, providing quantitative values for the appropriate driving pressure and expected gas removal time in practical device operation.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.3
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• pp.61-71
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• 2014

As the occupancy rate of the flash memory increases in the storage media market for the embedded system and the semi-conductor industry grows, the demand and supply of flash memory is increasing by a big margin. They are especially used in large quantity in the smart phones, tablets, PC, SSD and Soc(System on Chip) etc. The flash memory is divided into the NOR type and NAND type according to the cell arrangement structure and the NAND type is divided into the SLC(Single Level Cell) and MLC(Multi Level Cell) according to the number of bits that can be stored in each cell. Many tests have been performed on NOR type such as BIST(Bulit-In Self Test) and BIRA(Bulit-In Redundancy Analysis) etc, but there is little study on the NAND type. For the case of the existing BIST, the test can be proceeded using external equipments like ATE of high price. However, this paper is an attempt for the improvement of credibility and harvest rate of the system by proposing the BIST for the MLC NAND type flash memory of Finite State Machine structure on which the pattern test can be performed without external equipment since the necessary patterns are embedded in the interior and which uses the MLC NAND March(x) algorithm and pattern which had been proposed for the MLC NAND type flash memory.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.477-483
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• 2008

The paper introduces mobile handset multi-band chip antenna to be used on meander line PIFA structure and parasite patch. The proposed antenna uses an FR-4 substrate. The top layer is consist of meander lines PIFA structure to implement GSM900 and is connected with each rad and meander line on the via-hole for maximize space efficiency. The middle layer is designed with the signal line and gap to implement a DCS and PCS bands, the bottom layer which is added to a parasite patch on the ground can be show an adjust of frequency and impedance character by the connection of the radiators of middle layer and coupling. The fabricated antenna with the dimension of $28{\times}6{\times}4\;mm^3$. The ground plane a dimension of $45{\times}90\;mm$, designed by a commercial software CST simulator. The experimental results show that the bandwidth for(VSWR<3) is 90($875{\sim}965$) MHz in GSM900 band operation and 380($1,670{\sim}2,050$) MHz in DCS, PCS band operation. The maximum gains of antenna are 0.25 dBi, 3.65 dBi and 3.3 dBi at resonance frequencies and it has omni-directional pattern practically.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.9
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• pp.40-49
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• 2011

Integrating massive components and low-power policies have been actively investigated for system-on-chip designs. But in recent years, finding the optimal interconnection structure among heterogeneous components has emerged as a critical system design issue. Therefore, various simulation tools to model interconnection designs are being developed and performance evaluation of simulation is reflected in the real design. But most of the simulation environments employ traffic generation based on the mathematical probability functions, and such traffic generation cannot fully cover for various situations that may be occurred in the real system. Therefore, the demand for traffic pattern generation based on real applications is increasing. However, there have been few simulators that adopt application-specific traffic generators. This paper proposes a novel traffic generation method in simulating various interconnection structures for multi-processor system-on-chip design. The proposed traffic generation method can generate traffic patterns that can reflect the actual characteristics of the application and evaluate the performance of an interconnection structure under more realistic circumstance than traffic patterns using mathematical probability functions. By comparing the differences between the proposed method and the one based on mathematical probability functions, this paper shows advantages of the proposed traffic generation method.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.2
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• pp.31-43
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• 2019

In this study, polymer elastic bumps were fabricated for the flexible electronic package flip chip bonding and the viscoelastic and viscoplastic behavior of the polymer elastic bumps according to the temperature and load were analyzed using FEM and experiments. The polymer elastic bump is easy to deform by the bonding load, and it is confirmed that the bump height flatness problem is easily compensated and the stress concentration on thin chip is reduced remarkably. We also develop a spiral cap type and spoke cap type polymer elastic bump of $200{\mu}m$ diameter to complement Au metal cap crack phenomenon caused by excessive deformation of polymer elastic bump. The proposed polymer elastic bumps could reduce stress of metal wiring during bump deformation compared to metal cap bump, which is completely covered with metal wiring because the metal wiring on these bumps is partially patterned and easily deformable pattern. The spoke cap bump shows the lowest stress concentration in the metal wiring while maintaining the low contact resistance because the contact area between bump and pad was wider than that of the spiral cap bump.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.6
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• pp.44-55
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• 2009

Diagnosis of diseases using gene expression data obtained from microarray chip is an active research area recently. It has been done by general machine learning algorithms, because it is difficult to analyze directly. However, recent research results about the analysis based on the interaction between genes is essential for the gene expression analysis, which means the analysis using the traditional machine learning algorithms has limitations. In this paper, we classify the gene expression data using the hyper-network model that considers the higher-order correlations between the features, and then compares the classification accuracies. And also, we present the new hypo-network model that improve the disadvantage of existing model, and compare the processing performances of the existing hypo-network model based on general sequential processor and the improved hypo-network model implemented on parallel processors. In the experimental results, we show that the performance of our model shows improved and competitive classification performance than traditional machine learning methods, as well as, the existing hypo-network model. We show that the performance is maximized when the hypernetwork model is implemented on our parallel processors.