• Title/Summary/Keyword: Chip on chip technology

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A Bibliometric Analysis on LED Research (계량서지적 기법을 활용한 LED 핵심 주제영역의 연구 동향 분석)

  • Lee, Jae-Yun;Kim, Pan-Jun;Kang, Dae-Shin;Kim, Hee-Jung;Yu, So-Young;Lee, Woo-Hyoung
    • Journal of Information Management
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    • v.42 no.3
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    • pp.1-26
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    • 2011
  • The domain of LED is analyzed for describing the current status of Korea's R&D in the domain comparing with those of others quantitatively. Fourteen sub-domains of LED manufacturing technology are selected and the time span for analysis is ten-year: 2001-2010. Bibiliometric analysis is performed by the unit of publication, core researcher, institution and country. Strategical diagram is also produced with devised two indicators: NGI and NPI. As a result, Korea is competitive in the area of Chip Scale Package, but R&D supports in another promising areas, such as large-caliber sapphire wafer, are necessary. It is also revealed that research activities are expanded dominantly in academia, but practical technologies are developed in industrial circle. It is suggested that to support core corporate and to encourage industrial-academic collaboration is essential for systematical technology development and high achievement in prominent areas.

Effects of Retinoic Acid on Differentiation and Gene Expression of Pig Preadipocytes (Retinoic Acid가 돼지 지방전구세포의 분화와 유전자 발현에 미치는 영향)

  • Lim, Hee-Kyong;Choi, Kang-Duk;Oyungerel, Baatartsogt;Choi, Young-Suk;Chung, Chung-Soo
    • Journal of Animal Science and Technology
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    • v.50 no.4
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    • pp.475-484
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    • 2008
  • The current study was undertaken to determine the effect of retinoic acid(RA) on differentiation and gene expression of pig preadipocytes. The preadipocytes were isolated from the backfat of the new-born pigs. RA was treated to the cultured cells for 4 days and RNA was extracted from the cells. Isolated RNA went through in situ hybridization using the 14,688-gene cDNA microarray chip. Degree of cell differentiation was determined by measuring glycerol 3-phosphate dehydrogenase activity. RA decreased differentiation of pig preadipocytes by 78%. Fourteen genes were significantly up-regulated by RA, including genes known to be involved in lipid metabolism, particulary sphingomyelin phosphodiesterase, apolipoprotein R precursor, growth factor receptor-bound protein 14, retinoic acid receptor RXR gamma. However, the expression of vascular endothelial growth factor D precursor and growth hormone receptor precursor genes playing a central role in cell growth, was greatly decreased. These results suggest that RA inhibits differentiation of pig preadiocytes by regulation of gene expression of the growth factor or growth hormone receptor.

Design of a Full-Printed NFC Tag Using Silver Nano-Paste and Carbon Ink (은 나노 분말과 카본 잉크를 이용한 완전 인쇄형 NFC 태그 설계)

  • Lee, Sang-hwa;Park, Hyun-ho;Choi, Eun-ju;Yoon, Sun-hong;Hong, Ic-pyo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.4
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    • pp.716-722
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    • 2017
  • In this paper, a fully printed NFC tag operating at 13.56 MHz was designed and fabricated using silver nano-paste and carbon ink. The proposed NFC tag has a printed coil with an inductance of $2.74{\mu}H$ on a PI film for application to an NFC tag IC with an internal capacitance of 50 pF. Screen printing technology used in this paper has advantages such as large area printing for mass production, low cost and eco-friendly process compared to conventional PCB manufacturing process. The proposed structure consists of a circular coil implemented as a single layer using silver nano-paste and carbon ink, a jumper pattern for chip mounting between the outer edge and the center of the coil, and an insulation pattern between the coil and the jumper pattern. In order to verify the performance of the proposed NFC tag, we performed the measurements of the printing line width, thickness, line resistance, adhesion and environmental reliability, and confirmed the suitability of the NFC tag based on the full-printed manufacturing method.

Micro fluxgate magnetic sensor using multi layer PCB process (PCB 다층 적층기술을 이용한 마이크로 플럭스게이트 자기 센서)

  • Choi, Won-Youl;Hwang, Jun-Sik;Choi, Sang-On
    • Journal of Sensor Science and Technology
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    • v.12 no.2
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    • pp.72-78
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    • 2003
  • To observe the effect of excitation coil pitch on the micro fluxgate magnetic sensor, two sensors are fabricated using multi layer board process and the pitch distance of excitation coil are $260\;{\mu}m$ and $520\;{\mu}m$, respectively. The fluxgate sensor consists of five PCB stack layers including one layer of magnetic core and four layers of excitation and pick-up coils. The center layer as magnetic core is made of a Co-based amorphous magnetic ribbon with extremely high DC permeability of ${\sim}100,000$ and has a rectangular-ring shape to minimize the magnetic flux leakage. Four outer layers as excitation and pick-up coils have a planar solenoid structure and are made of copper foil. In case of the fluxgate sensor having the excitation coil pitch of $260\;{\mu}m$, excellent linear response over the range of $-100\;{\mu}T$ to $+100\;{\mu}T$ is obtained with sensitivity of 780 V/T at excitation sine wave of $3V_{p_p}$ and 360 kHz. The chip size of the fabricated sensing element is $7.3\;{\times}\;5.7\;mm^2$. The very low power consumption of ${\sim}8\;mW$ is measured. This magnetic sensor is very useful for various applications such as: portable navigation systems, telematics, VR game and so on.

A 1.1V 12b 100MS/s 0.43㎟ ADC based on a low-voltage gain-boosting amplifier in a 45nm CMOS technology (45nm CMOS 공정기술에 최적화된 저전압용 이득-부스팅 증폭기 기반의 1.1V 12b 100MS/s 0.43㎟ ADC)

  • An, Tai-Ji;Park, Jun-Sang;Roh, Ji-Hyun;Lee, Mun-Kyo;Nah, Sun-Phil;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.122-130
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    • 2013
  • This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

The Integer Number Divider Using Improved Reciprocal Algorithm (개선된 역수 알고리즘을 사용한 정수 나눗셈기)

  • Song, Hong-Bok;Park, Chang-Soo;Cho, Gyeong-Yeon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1218-1226
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    • 2008
  • With the development of semiconductor integrated technology and with the increasing use of multimedia functions in computer, more functions have been implemented as hardware. Nowadays, most microprocessors beyond 32 bits generally implement an integer multiplier as hardware. However, as for a divider, only specific microprocessor implements traditional SRT algorithm as hardware due to complexity of implementation and slow speed. This paper suggested an algorithm that uses a multiplier, 'w bit $\times$ w bit = 2w bit', to process $\frac{N}{D}$ integer division. That is, the reciprocal number D is first calculated, and then multiply dividend N to process integer division. In this paper, when the divisor D is '$D=0.d{\times}2^L$, 0.5 < 0.d < 1.0', approximate value of ' $\frac{1}{D}$', '$1.g{\times}2^{-L}$', which satisfies ' $0.d{\times}1.g=1+e$, $e<2^{-w}$', is defined as over reciprocal number and then an algorithm for over reciprocal number is suggested. This algorithm multiplies over reciprocal number '$01.g{\times}2^{-L}$' by dividend N to process $\frac{N}{D}$ integer division. The algorithm suggested in this paper doesn't require additional revision, because it can calculate correct reciprocal number. In addition, this algorithm uses only multiplier, so additional hardware for division is not required to implement microprocessor. Also, it shows faster speed than the conventional SRT algorithm and performs operation by word unit, accordingly it is more suitable to make compiler than the existing division algorithm. In conclusion, results from this study could be used widely for implementation SOC(System on Chip) and etc. which has been restricted to microprocessor and size of the hardware.

A Read-In Integrated Circuit for IR Scene Projectors Adopting a Sub-Frame Control Technique for Minimizing the Temperature Loss (온도 손실의 최소화를 위해 Sub-Frame 제어 기법을 적용한 적외선 영상 투사기용 신호입력회로)

  • Shin, Uisub;Cho, Min Ji;Kang, Woo Jin;Jo, Young Min;Lee, Hee Chul
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.8
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    • pp.113-118
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    • 2016
  • In this paper, a read-in integrated circuit (RIIC) for IR scene projectors (IRSPs) adopting a sub-frame control technique is proposed, which minimizes the reduction of the apparent temperature of the IR images projected from IRSPs operating at a frame rate of 30 Hz. The proposed sub-frame control technique significantly reduces the amount of scene data loss on capacitors, which is caused by leakage currents flowing through MOSFET switches during holding periods, by dividing a unit frame into 8 sub-frames and refreshing the same scene data for each sub-frame. A current-drive RIIC was designed for the higher apparent temperature of IR radiated from the emitter, and it receives the scene data as a form of analog voltages from an external DAC. A prototype chip with a $64{\times}32$ RIIC array was fabricated using Magnachip/SKhynix $0.35{\mu}m$ 2-poly 4-metal CMOS process, and the measured maximum output data current is $230.3{\mu}A$. This amount of current ensures the projection of IR images whose maximum apparent temperature is $366.2^{\circ}C$ in the mid-wavelength IR (MWIR) when applied to a prototype emitter having a resistance of $15k{\Omega}$.

Numerical Study of Warpage and Stress for the Ultra Thin Package (수치해석에 의한 초박형 패키지의 휨 현상 및 응력 특성에 관한 연구)

  • Song, Cha-Gyu;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.4
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    • pp.49-60
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    • 2010
  • Semiconductor packages are increasingly moving toward miniaturization, lighter and high performance. Futhermore, packages become thinner. Thin packages will generate serious reliability problems such as warpage, crack and other failures. Reliability problems are mainly caused by the CTE mismatch of various package materials. Therefore, proper selection of the package materials and geometrical optimization is very important for controlling the warpage and the stress of the package. In this study, we investigated the characteristics of the warpage and the stress of several packages currently used in mobile devices such as CABGA, fcSCP, SCSP, and MCP. Warpage and stress distribution are analyzed by the finite element simulation. Key material properties which affect the warpage of package are investigated such as the elastic moduli, CTEs of EMC molding and the substrate. Geometrical effects are also investigated including the thickness or size of EMC molding, silicon die and substrate. The simulation results indicate that the most influential factors on warpage are EMC molding thickness, CTE of EMC, elastic modulus of the substrate. Simulation results show that warpage is the largest for SCSP. In order to reduce the warpage, DOE optimization is performed, and the optimization results show that warpage of SCSP becomes $10{\mu}m$.

Adiabatic Optical-fiber Tapers for Efficient Light Coupling between Silicon Waveguides and Optical Fibers (실리콘 도파로와 광섬유 사이의 효율적인 광 결합을 위한 아디아바틱 광섬유 테이퍼)

  • Son, Gyeongho;Choi, Jiwon;Jeong, Youngjae;Yu, Kyoungsik
    • Korean Journal of Optics and Photonics
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    • v.31 no.5
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    • pp.213-217
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    • 2020
  • In this study we report a wet-etching-based fabrication method for adiabatic optical-fiber tapers (OFTs), and describe their adiabaticity and HE11 mode evolution at a wavelength of 1550 nm. The profile of the fabricated system satisfies the adiabaticity properties well, and the far-field pattern from the etched OFT shows that the fundamental HE11 mode is maintained without a higher-order mode coupling throughout the tapers. In addition, the measured far-field pattern agrees well with the simulated result. The proposed adiabatic OFTs can be applied to a number of photonic applications, especially fiber-chip packages. Based on the fabricated adiabatic OFT structures, the optical transmission to the inversely tapered silicon waveguide shows large spatial-dimensional tolerances for 1 dB excess loss of ~60 ㎛ (silicon waveguide angle of 1°) and insertion loss of less than 0.4 dB (silicon waveguide angle of 4°), from the numerical simulation. The proposed adiabatic coupler shows the ultrabroadband coupling efficiency over the O- and C-bands.

Fracture Strength of All-Ceramic 3-Unit Fixed Partial Dentures Manufactured by CAD/CAM and Copy-Milling Systems (CAD/CAM 및 카피밀링 시스템을 이용하여 제작한 구치부 3-유닛 고정성 국소의치의 파절강도)

  • Kang, Hoo-Won;Kim, Hee-Jin;Kim, Jang-Ju;Ko, Myung-Won
    • Journal of Technologic Dentistry
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    • v.34 no.2
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    • pp.95-103
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    • 2012
  • Purpose: Fracture strength of all-ceramic 3-unit fixed partial dentures manufactured by CAD/CAM and copy-milling systems were evaluated. Methods: Zirconia cores were made by milling the pre-sintered zirconia block by CAD/CAM or copy milling method followed by subsequent sintering. By building-up the corresponding porcelains on the core, all-ceramic bridges were fabricated, and those were evaluated in comparison with PFM fixed partial denture. Results: During the flexural test of the 3-unit PFM bridge, the porcelain started to chip or break at 507.28(${\pm}62.82$)kgf and the metal framework did not break until the maximum load level of 800kgf which was set in the testing instrument of this study. However, among all-ceramic restoration test groups, Everest(EV) group showed a peeling off or breakage of the porcelain from 365.64(${\pm}64.96$)kgf and the core was broken at 491.77(${\pm}55.62$)kgf. Those values of Zirkonzahn(ZR) were 431.03(${\pm}58.47$)kgf and 602.74(${\pm}48.44$)kgf, respectively. The break strength of the porcelain of PFM(PM) group was significantly higher than that of EV (p<0.05) group and there was no significant difference when comparing to that of ZR (p>0.05). ZR group showed higher break strength than that of EV group however there was no significant difference (p>0.05). The break strength of cores were in the increasing order of EV < ZR < PM (p<0.05). Conclusion: We could find that even though the PM group fractured at much higher value than all-ceramic cores, the breakage values of the porcelain of PM group with crack formation or delamination, which will be regarded as clinical failure, was significantly higher than that of EV group and not significantly higher than that of ZR group at p-values of 0.05. The break strength of ZR group was higher than that of EV group at an insignificant level(p>0.05).