• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.12
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• pp.2865-2874
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• 2013

Recently, most of movies top-ranked in the box office are screening in Stereoscopic 3D, and the world's leading electronics companies such as Samsung and LG are getting the hots for 3DTV sales. However, each person has different binocular disparity and different viewing distance, and thus he or she feels the severe visual fatigue and headaches if he or she is watching 3D content with the same binocular disparity, which is very different from things he or she feels in the real world. To solve this problem, this paper proposes and implement a 3D rendering system that correct the disparity of 3D content by reflecting binocular distance and viewing distance. Then, the computational complexity is analyzed. Optical-flow and Warping algorithms turn out to consume 732 seconds and 5.7 seconds per frame, respectively. Therefore, a dedicated chip-set for both blocks is strongly required for real-time HD 3D display.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.9
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• pp.592-607
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• 2006

This paper proposes a technique to select processors and hardware IPs and to map the tasks into the selected processing elements, aming to achieve high performance with minimal system cost when multitask applications with real-time constraints are run on a multicore SoC. Such technique is called to 'Hardware-Software Cosynthesis Technique'. A cosynthesis technique was already presented in our early work [1] where we divide the complex cosynthesis problem into three subproblems and conquer each subproblem separately: selection of appropriate processing components, mapping and scheduling of function blocks to the selected processing component, and schedulability analysis. Despite good features, our previous technique has a serious limitation that a task monopolizes the entire system resource to get the minimum schedule length. But in general we may obtain higher performance in multitask multicore system if independent multiple tasks are running concurrently on different processor cores. In this paper, we present two mapping techniques, task mapping avoidance technique(TMA) and task mapping pinning technique(TMP), which are applicable for general cases with diverse operating policies in a multicore environment. We could obtain significant performance improvement for a multimedia real-time application, multi-channel Digital Video Recorder system and for randomly generated multitask graphs obtained from the related works.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.211-214
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• 2003

Current VOD embodiment way is embodied using PC base. However, achieved research that embody this by Embedded System that PC base is not. OS of this system used WindowsCE.net and x86core used having built-ined SC1200(National company's Geode's familys) by CPU and memory used 128MByte SDRAM. Used Mpeg Decoder for processing of video data, and used Enthernet Controller for Internet. Composite, component, S-Video of video output section of this system is and select one of these and connect on TV and did so that get into action. Actuality implementation manufactured necessary BIOS, WinodwsCE.NET Porting, DeviceDriver in system development and necessary simple Application in action confirmation, and Video Player used Window Media Player had included to WindowsCE.net. Therefore, treatise that see to supplement shortcomings of VOD service been embodying in current PC in Embedded System's form embody that there is sense do can.

• The KIPS Transactions:PartB
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• v.13B no.5 s.108
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• pp.507-514
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• 2006

Various application systems are developed using RFID as a part of ubiquitous computing, and it is expected that RFID chip will become wide-spread for the distribution industry especially. Efficient and efact intelligent-type of warehouse management system is essential for small-to-medium-sized enterprises in the situation having a trouble in the viewpoint of expense and manpower. In this paper, we implement small-scale warehouse management system using log-based context awareness technology. This system is implemented to be controlled on web, configuring clients to control RFID readers and building up DBMS system in a server. Especially, it grasps user's intention of storing or delivering based on toE data for the history of user's access to the system and it reports user's irregular pattern of warehouse use and serves predictive information of the control of goods in stock. As a result, the proposed system can contribute to enhance efficiency and correctness of small-scale warehouse management.

• The KIPS Transactions:PartA
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• v.10A no.4
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• pp.389-396
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• 2003

InfiniBand technology is being accepted as the future system interconnect to serve as the high-end enterprise fabric for cluster computing. This paper presents the design and implementation of the InfiniBand system interconnect, focusing on an InfiniBand host channel adapter (HCA) based on dual ARM9 processor cores The HCA is an SoC tailed KinCA which connects a host node onto the InfiniBand network both in hardware and in software. Since the ARM9 processor core does not provide necessary features for multiprocessor configuration, novel inter-processor communication and interrupt mechanisms between the two processors were designed and embedded within the KinCA chip. Kinch was fabricated as a 564-pin enhanced BGA (Bail Grid Array) device using 0.18${\mu}{\textrm}{m}$ CMOS technology Mounted on host nodes, it provides 10 Gbps outbound and inbound channels for transmit and receive, respectively, resulting in a high-performance cluster system.

• 제어로봇시스템학회:학술대회논문집
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• 1992.10a
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• pp.537-540
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• 1992

This paper presents Samsung CNC (Computer Numerical Controller) system with an intel 80486/487 as the main CPU and a 32 bit floating point DSP(Digital Signal Processor) TMS320C30 as the motion control CPU. The Samsung CNC system diverse user-frienly characteristics such as multi-tasking, powerful menu system, internal PLC system, and 2/3 dimensional graphics in wire and solid mode. The main CPU executes central processing program, user interface program, interpreter, BMI, etc while the motion control CPU carries out some interpolations, acceleration/deceleration, and PID control algorithm with feedforward terms. Complex interpolations except linear and circular ones are performed on the main control CPU. The experimental results for the circular interpolation under linear acceleration/deceleration shows that the proposed CNC system can be widely used in controlling machining centers with good machining accuracy.

• Korean Journal of Food Science and Technology
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• v.19 no.2
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• pp.129-133
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• 1987

To develop a microcomputer-based data acquisition system for measurement of variables such as temperature and weight in food process, a low-cost data acquisition system was developed using an Apple II microcomputer. The system consisted of a microcomputer, a temperature sensor made of pt-100, a strain gauge load cell for weighing, a preamplifier for signal conditionings and an interface device. Interface device was built with programmable interface chip MC 6821, tristate buffer 74244 and analog-to-digital converter ADC 0809. The analog signals of temperature and weight were serially acquisited upon the program. The BASIC language was used for operating the data acquisition and data handling programs. The system successfully measured the variables such as temperature and weight with various sampling intervals in food dehydration process.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.83-93
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• 2013

Recently, the SURF algorithm, which is conjugated for object tracking system as part of many computer vision applications, is a well-known scale- and rotation-invariant feature detection algorithm. The SURF, due to its high computational complexity, there is essential to develop a hardware accelerator in order to be used on an IP in embedded environment. However, the SURF requires a huge local memory, causing many problems that increase the chip size and decrease the value of IP in ASIC and SoC system design. In this paper, we proposed a way to design a SURF algorithm in hardware with greatly reduced local memory by partitioning the algorithms into several Sub-IPs using external memory and a DMA. To justify validity of the proposed method, we developed an example of simplified object tracking algorithm. The execution speed of the hardware IP was about 31 frame/sec, the logic size was about 74Kgate in the 30nm technology with 81Kbytes local memory in the embedded system platform consisting of ARM Cortex-M0 processor, AMBA bus(AHB-lite and APB), DMA and a SDRAM controller. Hence, it can be used to the hardware IP of SoC Chip. If the image processing algorithm akin to SURF is applied to the method proposed in this paper, it is expected that it can implement an efficient hardware design for target application.

• Journal of the Korean Society for Precision Engineering
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• v.27 no.1
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• pp.91-98
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• 2010

The increasing of power and processing speed and miniaturization of central processor unit (CPU) used in electronics equipment requires better performing thermal management systems. A typical thermal management package consists of thermal interfaces, heat dissipaters, and external cooling systems. There have been a number of experimental techniques and procedures for estimating thermal conductivity of thin, compressible thermal interface material (TIM). The TIM performance is affected by many factors and thus TIM should be evaluated under specified application conditions. In compact packaging of electronic equipment the chip is interfaced with a thin heat spreader. As the package is made thinner, the coupling between heat flow through TIM and that in the heat spreader becomes stronger. Thus, a TIM characterization system for considering the heat spreader effect is proposed and demonstrated in detail in this paper. The TIM test apparatus developed based on ASTM D-5470 standard for thermal interface resistance measurement of high performance TIM, including the precise measurement of changes in in-situ materials thickness. Thermal impedances are measured and compared for different directions of heat dissipation. The measurement of the TIM under the practical conditions can thus be used as the thermal criteria for the TIM selection.

• Journal of the Korea Society of Computer and Information
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• v.3 no.2
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• pp.77-84
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• 1998

The continuous time signal system by development of CMOS technology have been receiving consideration attention. In this paper, Low pass filter using CMOS floating resistor have been designed with cut off frequency for speech signal processing. Especially a new floating resistor consisting entirely of CMOS devices in saturation has been developed. Linearity within $\pm$0.04% is achieved through nonlineartiy via current mirrors over an applied range of $\pm$1V. The frequency response exceeds 10MHz, and the resistors are expected to be useful in implementing integrated circuit active RC filters. The low pass filter designed using this method has simpler structure than switched capacitor filter. So reduce the chip area. The characteristics of the designed low pass filter using this method are simulated by pspice program.