• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.1539-1542
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• 2002

In layout of LSI and PWB, block pack- ing problem is very important in order to reduce chip area. Sequence-pair is typical one of conventional pack- ing method and can search nearly-optimal solution by using Simulated Annealing(SA). SA takes huge computation time due to evaluating of various packing results. Therefore, Sequence-pair is not effective enough for fast layout evaluation including estimation of wire length and rotation of every blocks. This paper proposes an efficient block packing method to minimize wire length and chip area. Our method searches an optimal packing efficient- ly by using a cluster growth algorithm with changing the most valuable packing score on packing process.

• 한국기계가공학회지
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• 제11권5호
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• pp.137-141
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• 2012

In order to increase recyclability of new material, aluminium-lithium alloy(Al2050-T84), the chip is compressed in the type of cylinder after machining. This study is to review the effect of environmental condition such as temperature change and salt during the transportation by sea on the corrosion at the surface and inside of the compressed chip, and an effective packing method is presented in this paper.

• 대한전자공학회논문지SD
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• 제45권2호
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• pp.93-100
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• 2008

본 논문에서는 NoC 기반 SoC의 테스트 시간을 감소시키기 위하여 NoC를 TAM으로 재활용하는 구조를 바탕으로 하는 새로운 형태의 스케줄링 알고리즘을 제안한다. 제안한 방식에서는 기존 연구된 NoC 테스트 플랫폼을 사용하여 스케줄링 문제를 rectangle packing 문제로 변환하고 이를 simulated annealing(SA) 기법을 적용하여 향상된 스케줄링 결과를 유도한다. ITC'02 벤치회로를 이용한 실험 결과 제안한 방법이 기존 방법에 비해 최대 2.8%까지 테스트 시간을 줄일 수 있음을 확인하였다.

• 한국생산제조학회지
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• 제25권3호
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• pp.224-229
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• 2016

Recently, polymeric micro-fluidic biochips with numerous micro patterns on the surface were fabricated by injection molding for realizing low-cost mass production of devices. To evaluate the effects of process parameters on large-scale micro-structure replication, a $50{\times}50mm^2$ tool insert with surface structures having a patterns of trapezoidal shapes (height: $30{\mu}m$) was employed. During injection molding, PMMA was used; packing phase parameters and mold temperature were investigated. The replicated surface textures were quantitatively characterized by confocal laser microscopy with 10-nm resolution. The degree of replication at low mold temperatures was found to be higher than that at high mold temperature at the beginning of the packing stage. Thereafter, the degree of replication increased to a greater extent at higher mold temperatures; application of higher mold temperatures improved the degree of replication.

• ETRI Journal
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• 제30권1호
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• pp.129-140
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• 2008

In this paper, we propose a novel ant colony optimization (ACO)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip (SoCs), on the assumption that the test platform, including specific methods and configurations such as test packet routing, generation, and absorption, is installed. The ACO metaheuristic model, inspired by the ant's foraging behavior, can autonomously find better results by exploring more solution space. The proposed method efficiently combines the rectangle packing method with ACO and improves the scheduling results by dynamically choosing the test-access-mechanism widths for cores and changing the testing orders. The power dissipation and variable test clock mode are also considered. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce overall test time. Moreover, the computation time of the algorithm is less than a few seconds in most cases.

• 한국정밀공학회지
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• 제12권1호
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• pp.22-28
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• 1995

Micro Drills have found ever wider application. However micro drilling is a machining to integrate the difficult machinablities such as tool stiffness, position control and revolution accuracy, and is known to cost and time consuming. So, this study aimed to practice ultraminiature drilling(0.05 .phi. ) wiht simple component, if possible. System is developed as the three modules : feed drives, spindle and monitoring part. The dynamics of measured current signals from the spindle of Micro Hole Drilling machine are investigated to establish the criteria of stepfeed mechanism. Cutting experiments identify the relationship of spindle rpm, feed rate and tool life. The smaller drill diameter is, the more suitable cutting condition have to be selected because of chip packing.

• International Journal of Quality Innovation
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• 제8권3호
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• pp.81-112
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• 2007

In the competitive global market, firms have to keep profit from innovation activities. A firm makes profits by offering products or services at a lower cost than its competitors or by offering differentiated products at premium prices that more than compensate for the extra cost of differentiation. The IC Package and Testing technology industries were the first high technological industry to build in Taiwan. The Package and Testing industries in Taiwan adopted competitive innovation activities to become stronger. In our study, we want to know how innovation activities influence a firm operating in the IC Package and Testing industries. Our study used a questionnaire and Likert five-point scale to survey the innovation activities, customer and feedback in innovation performance in the IC Package and Testing industry. The wafer level chip size packing technology in our study indicates the innovation activities. Because we need to compare the difference between the wafer level chip size packing technology and wire bonding technology to recognize innovation and how the innovator and customer were influenced. Our conclusions are described below: (1) When the innovator adopts innovation activities that can be maintained using experiments and knowledge, using machine and decision variables more quickly will produce success; (2) Innovators should adopt innovation activities that focus on customers that use knowledge and experimentation, training time and cost. If an innovation forces customers to spend much time and cost to learn new technology or applications, the innovation will not be adopted; (3) Innovators that create innovation performance higher than his customers must also consider the impact upon their customers. We have to remind innovator to focus on why their customers have a different level of evolution in the same innovation activities.

• Bulletin of the Korean Chemical Society
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• 제33권4호
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• pp.1135-1140
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• 2012

An electrochromatographic microchip with carboxyl-group-derivatized mono-disperse silica packing was prepared from the corresponding colloidal silica solution by utilizing capillary action and self-assembly behavior. The silica beads in water were primed by the capillary action toward the ends of cross-patterned microchannel on a cyclic olefinic copolymer (COC) substrate. Slow evaporation of water at the front of packing promoted the self-assembled packing of the beads. After thermally binding a cover plate on the chip substrate, reservoirs for sample solutions were fabricated at the ends of the microchannel. The packing at the entrances of the microchannel was silver coated to fix utilizing an electroless silver-plating technique to prevent the erosion of the packed structure caused by the sudden switching of a high voltage DC power source. The electrochromatographic behavior of the microchip was explored and compared to that of the microchip with bare silica packing in basic borate buffer. Electrophoretic migration of Rhodamine B was dominant in the microchip with the carboxyl-derivatized silica packing that resulted in a migration approximated twice as fast, while the reversible adsorption was dominant in the bare silica-packed microchip. Not only the faster migration rates of the negatively charged FITC-derivatives of amino acids but also the different migration due to the charge interaction at the packing surface were observed. The electrochromatographic characteristics were studied in detail and compared with those of the bare silica packed microchip in terms of the packing material, the separation potential, pH of the running buffer, and also the separation channel length.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1996년도 추계학술대회 논문집
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• pp.588-592
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• 1996

In this paper, we have constructed an expert system for semiconductor chip encapsulation which combines a knowledge-based system with CAE software. The knowledge-base module includes heuristic and pre-analysis knowledge for evaluation and redesign. Evaluation of the initial design and generation of redesign recommendations can be developed from the rules as applied to a given chip Package. The CAE programs can be used for simulating the filling and packing stage of encapsulation process. The expert system is a new tool which enables package design or process conditions with high yields and high productivity.

• 한국정밀공학회지
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• 제15권2호
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• pp.99-106
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• 1998

In this paper, we have constructed an expert system for semiconductor chip encapsulation which combines a knowledge-based system with CAE software. The knowledge-base module includes heuristic and pre analysis knowledge for evaluation and redesign. Evaluation of the initial design and generation of redesign recommendations can be developed from the rules as applied to a given chip package. The CAE programs can be used for simulating the filling and packing stage of encapsulation process. The expert system is a new tool which enables package design or process conditions with high yields and high productivity.