• 제목/요약/키워드: Chip Mounting Technology

검색결과 38건 처리시간 0.025초

머신비전을 이용한 FPC의 자동정렬 및 장착 (Automatic Alignment and Mounting of FPCs Using Machine Vision)

  • 신동원
    • 한국기계가공학회지
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    • 제6권3호
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    • pp.24-30
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    • 2007
  • The FPCs(Flexible Printed Circuit) are currently used in several electronic products like digital cameras, cellular phones because of flexible material characteristics. Because the FPC is usually small size and flexible, only one FPC should not enter chip mounting process, instead, several FPCs are placed on the large rigid pallette and enter into the chip mounting process. Currently the job of mounting FPC on the pallette is carried by totally manual way. Thus, the goals of the research is develop the automatic machine of FPC mounting on pallette using vision alignment. Instead of using two cameras or using moving one camera, the proposed vision system with only one fixed camera is adopted. Moreover, the two picker heads which can handle two FPCs simultaneously are used to make process time shortened. The procedure of operation is firstly to measure alignment error of FPC, correct alignment errors, and finally mount well-aligned FPC on the pallette. The vision technology is used to measure alignment error accurately, and precision motion control is used in correcting errors and mounting FPC.

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무연솔더 적용한 0402 칩의 공정제어 (Processing Control of 0402 Chip used Pb-free Solder in SMT process)

  • 방정환;이창우;이종현;김정한;남원우
    • 대한용접접합학회:학술대회논문집
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    • 대한용접접합학회 2007년 추계학술발표대회 개요집
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    • pp.218-221
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    • 2007
  • The surface mounting technology of 0402 electric chip part is necessary to fabricate a high density and multi-functional module, but there is a limitation of the technology, like as a bridge and self-alignement. This work estimated SMT processing factors of 0402 chip. To obtain optimum SMT process, we evaluated effects of stencil thickness, shape of hole on printability and mountability. Printability shows best results under the thickness of $80{mu}m$ with circle hole shape and 90% square hole shape. In case of chip mounting process, chip mis-alignment and bridge was occurred rarely in same conditions. In more thin stencil thickness, $50{mu}m$, strength of 1005 chip parts was poor, because of amount of printed solder was insufficient.

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2개의 헤드를 갖는 FPC 비전 정렬 장착기의 개발 (Development of FPC Vision Aligning Mounter with Two Picker Heads)

  • 신동원
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 추계학술대회 논문집
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    • pp.390-393
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    • 2005
  • he FPCs(Flexible Printed Circuit) are currently used in several electronic products like digital cameras, cellular phones because of flexible material characteristics. Because the FPC is usually small size and flexible, only one FPC should not enter chip mounting process, instead, several FPCs is placed on the large rigid pallette and go to the chip mounting process. Currently the job of mounting FPC on the pallette is carried by totally manual way. Thus, the goals of the research is develop the automatic machine of FPC mounting on pallette using vision alignment. The procedure of operating machine is firstly to measure alignment error of FPC, correct alignment errors, and finally mount well-aligned FPC on the pallette. The vision technology is used to measure alignment error accurately, and precision motion control is used in correcting errors nd mounting FPC. The two picker heads handling two FPC together is used to increase the productivity.

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Fiber sensor를 이용한 미소칩 미삽 방지 표면실장기술 (The surface mounting technology to prevent improper fine chip insertions by using fiber sensors)

  • 김영민;김현종;엄순천;공헌택;김치수
    • 한국산학기술학회논문지
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    • 제12권9호
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    • pp.4138-4146
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    • 2011
  • 표면실장기술(SMT: Surface Mount Technology)에 있어서 휴대폰 및 평판 디스플레이가 점점 가볍고 얇아지면서 이 제품에 사용되는 전자부품이 작아지고 있어, 0402, 0603 Chip등과 같은 SMD(Surface Mount Device) 부품을 실장하는 기술이 대두되고 있다. 따라서 Chip Mounter 제조회사들은 미삽이나 오삽을 방지하기 위한 실장기술에 대해 지속적인 연구를 해오고 있다. 본 연구는 이러한 미삽 오삽 방지를 실현하기 위하여 Fiber sensor를 이용하여 기계적 구조를 마련하고, 이를 활용한 시스템 알고리즘을 개선하는 기술을 제시한다.

Au-Au Flip Chip Mounting Technology by NEC

  • Hino, Shigekazu
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2000년도 2nd Korea-Japan Advanceed Semiconductor Packaging Technology Seminar
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    • pp.105-129
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    • 2000
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표면 실장 기술에서의 에어 스틱 피더와 파이버 센서를 이용한 생산성 향상에 관한 연구 (A Study on the Productivity Improvement used by the Air Stick Feeder and the Fiber Sensors in Surface Mount Technology)

  • 김영민;김치수
    • 한국산학기술학회논문지
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    • 제16권3호
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    • pp.2146-2150
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    • 2015
  • 표면 실장 기술은 자동차 정션박스 등에 삽입되는 릴레이를 칩 마운터를 이용하여 실장 하는 경우와 0402, 0603과 같은 소형의 부품을 실장 하는 경우가 있다. 본 논문에서는 무거운 무게로 인해 문제가 발생하는 릴레이를 공급하기 위한 스틱 튜브의 개발과 반대로 너무 크기가 작아 발생하는 미 오삽 방지를 위한 파이버 센서를 이용한 기술을 제시하여 얼마나 생산성이 향상되었는지 실험을 통해 보여준다.

High-density Through-Hole Interconnection in a Silicon Substrate

  • Sadakata, Nobuyuki
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 International Symposium
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    • pp.165-172
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    • 2003
  • Wafer-level packaging technology has become established with increase of demands for miniaturizing and realizing lightweight electronic devices evolution. This packaging technology enables the smallest footprint of packaged chip. Various structures and processes has been proposed and manufactured currently, and products taking advantages of wafer-level package come onto the market. The package enables mounting semiconductor chip on print circuit board as is a case with conventional die-level CSP's with BGA solder bumps. Bumping technology is also advancing in both lead-free solder alternative and wafer-level processing such as stencil printing using solder paste. It is known lead-free solder bump formation by stencil printing process tend to form voids in the re-flowed bump. From the result of FEM analysis, it has been found that the strain in solder joints with voids are not always larger than those of without voids. In this paper, characteristics of wafer-level package and effect of void in solder bump on its reliability will be discussed.

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열하중하에 있는 IC 패키지의 점탄성 파괴해석 (Visco-Elastic Fracture Analysis of IC Package under Thermal Loading)

  • 이강용;양지혁
    • 한국정밀공학회지
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    • 제15권1호
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    • pp.43-50
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    • 1998
  • The purpose of the paper is to protect the damage of plastic IC package with searching the cause of the fracture due to the delamination and crack when the encapsulant of plastic IC package is on viscoelastic behavior with the effect of creep on high temperature, The model for analysis is the plastic SOJ package with dimpled diepad in the IR soldering process of surface mounting technology. The risk of delamination with calculating the distribution of viscoelastic thermal stress in the package without the crack in the surface mounting process is checked. The package model with the perfect delamination between chip and diepad is chosen to estimate the resistance against fracture in thermal loading with calculating C (t)-integrals according to the change of the design. The optimum design to depress the delamination and crack is presented.

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교육용 소형 SMT 플랫폼 설계에 관한 연구 (A Study on the Design of Small SMT Platform for Education)

  • 박세준
    • Journal of Platform Technology
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    • 제8권1호
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    • pp.24-32
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    • 2020
  • 본 논문은 SMT라인의 핵심 기술인 칩마운터의 보급을 위해 교육연구용이나 샘플제작을 목적으로 사용이 가능한 3D 프린터 기술기반의 칩마운터를 설계하고 제작하였다. 저가형 구동부 설계를 위해 오픈루프제어가 가능한 스텝모터를 사용하였다. 스텝모터 사용으로 발생하는 모터의 진동, 탈조 등의 특성상 단점은 마이크로스텝제어 방법을 이용하여 보완하였다. 칩마운터 실험은 제작한 소형 칩마운터에 거버파일을 생성하고 실제 크기로 프린트하여 샘플보드 제작과 동일한 방법으로 HASL 처리되어 있는 PCB에 솔더크림을 프린팅한 후 부품을 실장하여 여러 번 반복해서 수행하였다. 실험결과 2012 미소부품과 달리 보정이 필요한 SOIC, TQFP 등의 부품은 부품 실장 시간이 2배정도 길었지만 비교적 정확히 실장되는 것을 확인할 수 있었다. 또한, 초기 위치에 대한 오차를 총 10회에 반복하여 측정한 결과 약 0.110mm의 비교적 적은 오차가 발생함을 확인할 수 있었다.

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