• Journal of Electrical Engineering and Technology
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• v.6 no.4
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• pp.551-555
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• 2011

The Crab label tag with a loop matching feed and a modified dipole antenna structure was proposed. The antenna impedance is conjugated easily to a radio frequency identification IC chip impedance by a loop matching feed. The reading range of the crab structure tag is 0.9-1.0 m from the upper side of the formula milk can lid. The fabricated label tag size is $44.0{\times}44.0mm^2$. The operating frequency at -3 dB return loss is 861.0-929.0 MHz, and the maximum reading range at the anechoic chamber is 1.5 m.

• Transactions on Electrical and Electronic Materials
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• v.17 no.2
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• pp.118-120
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• 2016

A coplanar waveguide employing periodic 3D coupling structures (CWP3DCS) was developed for application in miniaturized on-chip passive components on silicon radio frequency integrated circuits (RFIC). The CWP3DCS showed the shortest wavelength of all silicon-based transmission line structures that have been reported to date. Using CWP3DCS, a highly miniaturized impedance transformer was fabricated on silicon substrate, and the resulting device showed good RF performance in a broad band from 4.6 GHz to 28.6 GHz. The device as was 0.04 mm² in size, which is only 0.74% of the size of the conventional transformer on silicon substrate.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.19-26
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• 1997

Novel class AB CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well CMOS process for high-frequency current-mode signal processing were developed. The CCII for low power operation consists of a class AB push-pull stage for the current input, a complementary source follower for the voltage input, and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated CCII show that the current input impedance is 875.ohm. and the bandwidth of flat gain when used as a voltage amplifier extends beyond 4MHz. The power dissipation is 1.25mW and the active chip area is 0.2*0.15[mm$\^$2/].

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.1-9
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• 1997

Novel class A CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well standard CMOS process for high-frequency current-mode signal processing were developed. The CCII consists of a regulated current-cell for the voltage input and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated cCII show that the current input impedance is 308 .ohm. and the 3-dB cutoff frequency when used as a voltage amplifier extends beyond 10MHz. The linear dynamic ranges of voltage and current are from -0.5V to 1.5V and from -100.mu.A to +120.mu.A for supply voltage V$\_$DD/ = -V$\_$SS/=2.5V, respectively. The power dissipation is 2 mW and the active chip area is 0.2 * 0.2 [mm$\^$2/].

• Journal of electromagnetic engineering and science
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• v.13 no.3
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• pp.189-191
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• 2013

This letter presents a compact metamaterial-based tunable zeroth-order resonant antenna. It is based on the double-negative unit cell with a function of tunable inductance realized by a varactor and impedance convertor in the shunt branch. The resonant frequency of the designed antenna ranges from 2.31 to 3.08 GHz, depending on the capacitance of the used varactor. Its size is very compact ($0.05{\lambda}_0{\times}0.2{\lambda}_0$) with a relatively wide tunable range of 29.1%. The impedance bandwidth of the antenna is from 20 to 50 MHz for the resonant center frequency. The measured maximum total realized gain is from -0.68 dBi (2.43 GHz) to 1.69 dBi (2.97 GHz). The EM-simulated and measured results are in good agreement.

• ETRI Journal
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• v.30 no.4
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• pp.600-602
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• 2008

A very small patch-type RFID tag antenna (UHF band) using ceramic material mountable on metallic surfaces is presented. The size of the proposed tag is 25 mm${\times}$25 mm${\times}$3 mm. The impedance of the antenna can be easily matched to the tag chip impedance by adjusting the size of the shorting plate of the patch and the size of the feeding loop. The measured maximum reading distance of the tag at 910 MHz was 5 m when it was mounted on a 400 mm${\times}$400 mm metallic surface. The proposed design is verified by simulation and measurements which show good agreement.

• Journal of electromagnetic engineering and science
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• v.8 no.1
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• pp.28-33
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• 2008

We have proposed a novel DVB-H(Digital Video Broadcast for Handheld) antenna for folder-type mobile handheld terminal by using a coupling element, a stub, and an L-type matching circuit. The L-type matching circuit consisting of two chip inductors is used for achieving an improved impedance matching over the DVB-H frequency band ($470{\sim}702\;MHz$). Simulated results showed the stub worked to more knot the lower and upper frequency ends of the input impedance curve. The antenna exhibits a flat gain characteristic from 2 to 2.8 dBi over the DVB-H frequency band. The radiation patterns are a stable Figure-of-eight radiation pattern in the frequency range.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.5
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• pp.974-980
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• 1997

The 23GHz 1-state LNA was designed by using MPIE numerical analysis and conventional design EEsof softwares. The circuit was designed using conventional tools but analyzed and modified by using numerical MPIE tools. he matching sections was designed with parallel coupled filter-type, which gives impedance matching and DC blocking and has small discontinuities. THe FET chip is directly attached to the graound metal. The designed LNA gives 5.8dB gain and 2.5dB noise figure withoug considering the loss and impedance shift of connectors that degenerate the gain and noise figure considerably. this results gives very promising characteristics for our design process and matching schemes and fabrication technologies.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.125-131
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• 2002

This paper presents MMIC drive and power amplifiers covering 6-18 ㎓. For simple wideband impedance matching and less sensitivity to fabrication variation, modified distributed topologies are employed in the both amplifiers. Cascade amplifiers with a self-biasing circuit through feedback resistors are used as unit gain blocks in the drive amplifier, resulting in high gain, high stability, and compact chip size. Self impedance matching and high-pass, low-pass impedance matching networks are used in the power amplifier. In measured results, the drive amplifier showed good return losses ($S_11,{\;}S_{22}{\;}<{\;}-10.5{\;}dB$), gain flatness ($S_{21}={\;}16{\;}{\pm}0.6{\;}dB$), and $P_{1dB}{\;}>{\;}22{\;}dBm$ over 6-18 GHz. The power amplifier showed $P_{1dB}{\;}>{\;}28.8{\;}dBm$ and $P_{sat}{\;}{\approx}{\;}30.0{\;}dBm$ with good small signal characteristics ($S_{11}<-10{\;}dB,{\;}S_{22}{\;}<{\;}-6{\;}dB,{\;}and{\;}S_{21}={\;}18.5{\;}{\pm}{\;}1.25{\;}dB$) over 6-18 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.14-21
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• 2009

A digital differential transmitter based on CMOS inverter worked up to 2.8 Gbps at the supply voltage of 1 V with a $0.18{\mu}m$ CMOS process. By calibrating the output impedance of the transmitter, the impedance matching between the transmitter output and the transmission line is achieved. The PVT variations of pre-driver are compensated by the calibration of the rising-edge delay and falling-edge delay of the pre-driver outputs. The chip fabricated with a $0.18{\mu}m$ CMOS process, which uses the standard supply voltage of 1.8 V, gives the highest data rate of 4Gbps at the supply voltage of 1.2 V. The proposed calibration schemes improve the eye opening with the voltage margin by 200% and the timing margin by 30%, at 2.8 Gbps and 1 V.