• Journal of information and communication convergence engineering
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• v.9 no.5
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• pp.583-586
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• 2011

In this paper, subthreshold swing characteristics have been presented for double-gate MOSFETs, using the analytical model based on series form of potential distribution. Subthreshold swing is very important factor for digital devices because of determination of ON and OFF. In general, subthreshold swings have to be under 100mV/dec. The channel length $L_g$ is varied from 30nm to 100nm, and channel thickness $t_{si}$ from 15 to 20nm according to channel length, and oxide thickness 5nm to investigate subthreshold swing. The doping of channel is fixed with $10^{16}cm^{-3}$ p-type. The results show good agreement with numerical simulations, confirming this model.

• Journal of information and communication convergence engineering
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• v.9 no.6
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• pp.738-742
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• 2011

This paper has studied drain induced barrier lowering(DIBL) for Double Gate MOSFET(DGMOSFET) using analytical potential model. Two dimensional analytical potential model has been presented for symmetrical DGMOSFETs with process parameters. DIBL is very important short channel effects(SCEs) for nano structures since drain voltage has influenced on source potential distribution due to reduction of channel length. DIBL has to be small with decrease of channel length, but it increases with decrease of channel length due to SCEs. This potential model is used to obtain the change of DIBL for DGMOSFET correlated to channel doping profiles. Also device parameters including channel length, channel thickness, gate oxide thickness and doping intensity have been used to analyze DIBL.

• Journal of information and communication convergence engineering
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• v.8 no.4
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• pp.449-452
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• 2010

We have analyzed channel doping and dimensions(channel length, width and thickness) for the optimum subthreshold characteristics of DG(Double Gate) MOSFET based on the model of MicroTec 4.0. Since the DGMOSFET is the candidate device to shrink short channel effects, the determination of design rule for DGMOSFET is very important to develop sub-100nm devices for high speed and low power consumption. As device size scaled down, the controllability of dimensions and oxide thickness is very low. We have analyzed the short channel effects for the variation of channel dimensions, and found the design conditions of DGMOSFET having the optimum subthreshold characteristics for digital applications.

• Atmosphere
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• v.15 no.4
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• pp.203-211
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• 2005

One algorithm has been developed for retrieving aerosol optical thickness from GMS-5 visible channel measurements, and then the algorithm was applied for obtaining the geographical distribution of aerosol optical thickness over East Asia during April 2002. Algorithm employs a look-up table based upon radiative transfer calculations with solar geometry, aerosol optical thickness, and surface albedo as inputs. Validation was conducted by comparing retrieved aerosol optical thickness with measured values from ground-based sky radiation measurements at Anmyon Do, Korea. It was found that the correlation coefficient is 0.71 with -0.03 of bias and 0.34 of root mean square error, suggesting that the algorithm developed in this study can be used for estimating aerosol optical thickness in a quantitative sense.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.317-320
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• 2000

We have calculated the optimum refractive index and thickness for a single layer antireflection coating as a function of active layer width and thickness in buried channel waveguides. The results using the variational method to obtain the field profiles are compared to those using the effective index method.

• Journal of the Korean Society of Industry Convergence
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• v.20 no.3
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• pp.221-232
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• 2017

In this study, bipolar plates in fuel cells are formed using rubber forming process. The effects of important parameters in rubber forming such as hardness and thickness of rubber pad, speed and pressure of punch that compress blank, and physical property of materials on the channel depth were analyzed. In the soft material sheet Al1050, deeper channels are formed than in materials STS304 and Ti-G5. Formed channel depth was increased when hardness of rubber pad was lower, thickness of rubber pad was high, and speed and pressure of punch were high. It was found the deepest channel was achieved when forming process condition was set with punch speed and pressure at 30 mm/s and 55 MPa, respectively using rubber pad having hardness Shore A 20 and thickness 60 mm. The channel depths of bipolar plates formed with Al1050, STS304 and Ti-G5 under the above process condition were 0.453, 0.307, and 0.270 mm, respectively. There were no defects such as wrinkle, distortion, and crack found from formed bipolar plates.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.259-262
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• 2003

Superconducting flux flow transistor(SFFT) is based on a control of the Abrikosov vortex flowing along a channel. The induced voltage by moving of the Abrikosov vortex in SFFT is greatly affected by the thickness and width, of channel. In order to fabricate a reproducibility channel in SFFT, we have researched the variation of the critical characteristics of YBCO thin films with the etching time using ICP(Inductively coupled plasma) system. It was certified that the velocity of vortex decreased with increasing the width of channel and was saturated faster in low bias from a simulation. An etching mechanism of YBCO thin films by ICP system was also certified by AFM(Atomic Force Microscope) and by measuring the critical current density with etching time. As measurement result, we could analyze that we should optimize the etching thickness of channel part to construct a flux flow transistor with desired characteristics.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.7
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• pp.1617-1622
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• 2015

This paper analyzes the ratio of tunneling current for channel doping concentration of sub-10 nm asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current in subthreshold region increases in the region of channel length of 10 nm below. Even though asymmetric DGMOSFET is developed to reduce short channel effects, the increase of tunneling current in sub-10 nm is inevitable. As the ratio of tunneling current in off current according to channel doping concentration is calculated in this study, the influence of tunneling current to occur in short channel is investigated. To obtain off current to consist of thermionic emission and tunneling current, the analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for channel doping concentration in sub-10 nm asymmetric DGMOSFET, specially with parameters of channel length, channel thickness, and top/bottom gate oxide thickness and voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04b
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• pp.77-78
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• 2009

We report numerical simulations to investigate of the dependence of the on/off current ratio and channel charge distributions in silicon nanowire (SiNW) field-effect transistors (FETs) on the channel width and thicknesses. In order to investigate the transport behavior in devices with different channel geometries, we have performed detailed two-dimensional simulations of SiNWFETs and control FETs with a fixed channel length L of 10um, but varying the channel width W from 5nm to 5um, and thickness t from 10nm to 30nm. We have shown that $Q_{ON}/Q_{OFF}$ drastically decreases (from ${\sim}2.9{\times}10^4$ to ${\sim}9.8{\times}10^3$) as the channel thickness increases (from 10nm to 30nm). As a result of the simulation using a quantum model, even higher charge density in the bottom of SiNW channel was observed than that in the bottom of control channel.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.9
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• pp.728-731
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• 2009

We report numerical simulations to investigate of the dependendce of the on/off current ratio and channel charge distributions in silicon nanowire (SiNW) field-effect transistors (FETs) on the channel width and thicknesses. In order to investigate the transport behavior in devices with different channel geometries, we have performed detailed two-dimensional simulations of SiNWFETs and control FETs with a fixed channel length L of $10\;{\mu}m$, but varying the channel width W from 5 nm to $5\;{\mu}m$, and thickness t from 10 nm to 30 nm. We have show that $Q_{ON}/Q_{OFF}$ drastically decreases (from $^{\sim}2.9{\times}10^4$ to $^{\sim}9.8{\times}10^3$) as the channel thickness increases (from 10 nm to 30 nm). As a result of the simulation using a quantum model, even higher charge density in the bottom of SiNW channel was observed then in the bottom of control channel.