• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.1010-1019
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• 2005

In this paper, we used neural network technique to model memory effects of RF power amplifier which is fed by two-tone input signals. The memory effects in power amplifier were identified by observing the unsymmetrical distribution of IMD(Inter-Modulation Distortion) measurements with the change of tone spacings and power levels. Different asymmetries of IMD were also found at different center frequencies. We applied TDNN technique to model LDMOS power amplifier based on two tone IMD data, and the accuracy was very high compared to other modeling methods such as the(memoryless) adaptive modeling method.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.11 no.6
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• pp.1-9
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• 2002

This study describes the geometric characteristics and the 5-axis machining method in order to make end mill cutter coming with insert tips. End mill geometry is consisted of flute part and insert tip part. Flute part modeled by using ruled surfaces with constant helix angle, and insert tip part modeled by rectangular planes containing tapped hole of specified direction in its center. In this study, the modeled insert tip part considered both of a radial rake angle and a axial rake angle, because they were important cutting conditions. In order to machining the virtual end mill defined from geometric characteristics, we programmed a special software to machining the end mill considered in this study. This software can generate NC-codes about following processes, end milling or ball end milling of flute part end milling of rectangular plane, centering of hole, drilling of hole, and tapping of hole. Ant sampled end mills were modeled and machined on 5-axis CNC machining center with two index tables. Since machined end mills were very agreeable to designed end mills, we saw that the method proposed in this study can be very useful for manufacturing of end mill body with insert tip.

• Journal of Power Electronics
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• v.13 no.2
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• pp.177-185
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• 2013

This paper studies a soft switching DC/DC converter to achieve zero voltage switching (ZVS) for all switches under a wide range of load condition and input voltage. Two three-level PWM circuits with the same power switches are adopted to reduce the voltage stress of MOSFETs at $V_{in}/2$ and achieve load current sharing. Thus, the current stress and power rating of power semiconductors at the secondary side are reduced. The series-connected transformers are adopted in each three-level circuit. Each transformer can be operated as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer from the input side to the output side. Therefore, no output inductor is needed at the secondary side. Two center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Due to the resonant behavior by the resonant inductance and resonant capacitance at the transition interval, all switches are turned on at ZVS. Experiments based on a 1kW prototype are provided to verify the performance of proposed converter.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.261-264
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• 2004

In this paper, we identify the memory effect of high power(125W) laterally diffused metal oxide-semiconductor(LDMOS) RF Power Amplifier(PA) by two tone IMD measurement. We measure two tone IMD by changing the tone spacing and the power level. Different asymmetric IMD is founded at different center frequency measurements. We propose the Tapped Delay Line-Neural Network(TDNN) technique as the modeling method of LDMOS PA based on two tone IMD data. TDNN's modeling accuracy is highly reasonable compared to the memoryless adaptive modeling method.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.556-558
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• 1994

This paper proposes a new converter that can reduce the harmonics like conventional 12-pulse dual thyrister converters with the input transformers. Both the bridges are controlled with the shifted firing angle and connected through current sharing reactors. Using the center tapped reactor, the DC link current is controlled with the different two values in order to make the input current waveform 12 pulses.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.385-388
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• 1994

This paper presents a new configure rectifier which has improved input power factor and efficiency for DC arc weldings. Two rectifiers are series connected and they are single-phase full-wave phase controlled rectifiers that use a transformer with two center-tapped secondary. The input power factor can be improved by controlling the each phase of rectifiers sequentially, and then the efficiency can be also improved because the reactive component currents will be reduced. It is confirmed that the proposed rectifiers has about 80% of input power factor and efficiency with the experimental results which are carried out at the output ranges of 100A to 300A.

• Proceedings of the KIEE Conference
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• 2004.04a
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• pp.159-162
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• 2004

The paper proposes the coupled inductor rectifier of Three Level DC/DC converter CICDR-TL(Coupled Inductor Current Doubler Rectifier-Three Level) achieves Zero Voltage Switching (ZVS) for the switches in a wide load range and Zero Current Switching (ZCS) in a light load range. Advantages and disadvantages of this topology compared to the conventional Center Tapped TL Converter are discussed. Experimental evaluation results obtained on a 27V 60A DC/DC converter prototype for the 1.8kW 40kHz IGBT based experimental circuit.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.251-253
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• 2006

This paper presents a start-up in-rush current reduction technique of asymmetry half-bridge DC/DC converter for PC power supply. The proposed converter is composed center-tapped half-bridge converter with blocking capacitor. The proposed converter can reduce the severe in-rush current when the proposed converter is power up. The validity of this study is confirmed from the experimental results.

• Journal of Power Electronics
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• v.12 no.2
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.1
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• pp.110-116
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• 2013

This paper proposes a current ripple reduction method to improve the control performance of B4 type inverter that is studied for cost-effective drive systems. B4 inverters employ only four switches and they have a center-tapped connection between the split dc-link capacitors and one phase of a three-phase motor or load. In the B4 topology, unbalanced three-phase voltages will be generated due to the dc-link voltage ripple. To solve this problem, this paper presents a voltage distortion compensation method that adjusts the voltage reference with the consideration of dc-link voltage ripple. The validity of the proposed method is verified by simulation and excremental results with an induction machine.