• Title/Summary/Keyword: Cell-chip

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Simple Fabrication of Adipocyte Cell Chip Using Micropatterning (미세접촉인쇄법을 이용한 지방세포 칩 제작)

  • Kim, Gi Yong;Jeong, Heon-Ho;Lee, Chang-Soo;Roh, Changhyun
    • Korean Chemical Engineering Research
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    • v.54 no.2
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    • pp.223-228
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    • 2016
  • In this study, we described a simple and facile method to generate uniform microwells poly(dimethyl siloxane) (PDMS) microstamps through micro-molding for efficient, rapid and reliable cell patterning of adipocyte differentiation. In contrast to the conventional methods, the microstamp technologies are low expensive, non-toxic, and using a small amount of solution. Recently, Orlistat known as tetrahydrolipstatin is a prescription drug designed to treat obesity which is used to aid in weight loss and help to reduce overweight obesity. Here, 3T3-L1 cells were treated under various concentration manners of Orlistat $0.2{\mu}M{\sim}5.0{\mu}M$. and it was confirmed maximum 26.5% inhibition activity compared to control. Thus, we elucidated this platform can be used for the real-time analyzing of cell proliferation, adipocyte differentiation for evaluation of anti-obesity agents on cell chip. Furthermore, we except that this platform technology designed here might be readily be expanded to discover a wider variety of anti-obesity agents.

PLC Optical Sensor for Contamination Monitoring on the Flow-Cell in the Water Quality Measurement System (수질 측정용 플로우 셀의 오염 모니터링을 위한 평면광도파로 센서)

  • Han, Seung Heon;Kim, Tae Un;Jung, Haeng Yun;Ki, Hyun Chul;Kim, Doo Gun;Kim, Seon Hoon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.32 no.6
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    • pp.472-476
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    • 2019
  • We have proposed a novel planar lightwave circuit (PLC) optical sensor to monitor the contamination in a flow-cell where water is continuously supplied through a water quality measurement system. We designed a PLC chip with a V-shape waveguide and the simulated its function as a sensor for monitoring contamination in a flow-cell using a numerical the FDTD (finite-difference time-domain) analysis. A novel cross type of waveguide was introduced to make the PLC chip of the V-shaped waveguide. The fabricated PLC was cut into the cross waveguide. A change in the optical propagation loss of the PLC sensor was observed after immersing the PLC sensor into city water. It was determined that the propagation loss of the PLC sensor was 3 dB at a wavelength of $1.55{\mu}m$ in the city water for 15 days.

Surface Plasmon Resonance Imaging Analysis of Hexahistidine-tagged Protein on the Gold Thin Film Coated with a Calix Crown Derivative

  • Chung, Bong-Hyun;Baek, Seung-Hak;Shin, Yong-Beom;Kim, Min-Gon;Ro, Hyeon-Su;Kim, Eun-Ki
    • Biotechnology and Bioprocess Engineering:BBE
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    • v.9 no.2
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    • pp.143-146
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    • 2004
  • A surface plasmon resonance (SPR) imaging system was constructed and used to detect the hexahistidine-ubiquitin-tagged human parathyroid hormone fragment (His$\sub$6/-Ub-hPTHF(1-34)) expressed in Escherichia coli. The hexahistidine-specific antibody was immobilized on a thin gold film coated with ProLinker$\^$TM/ B, a novel calixcrown derivative with a bifunctional coupling property that permits efficient immobilizaton of capture proteins on solid matrices. The soluble and insoluble fractions of an E. coli cell lysate were spotted onto the antibody-coated gold chip, which was then washed with buffer (pH 7.4) solution and dried. SPR imaging measurements were carried out to detect the expressed His$\sub$6/-Ub-hPTHF(1-34). There was no discernible protein image in the uninduced cell lysate, indicating that non-specific binding of contaminant proteins did not occur on the gold chip surface. It is expected that the approach used here to detect affinity-tagged recombinant proteins using an SPR imaging technique could be used as a powerful tool for the analyses of a number of proteins in a high-throughput mode.

Evaluation of EM Susceptibility of an PLL on Power Domain Networks of Various Printed Circuit Boards (다양한 PCB의 전원 분배 망에서의 PLL의 전자기 내성 검증)

  • Hwang, Won-Jun;Wee, Jae-Kyung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.5
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    • pp.74-82
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    • 2015
  • As the complexity of an electronic device and the reduction of its operating voltage is progressing, susceptibility test of the chip and module for internal or external noises is essential. Although the immunity compliance of the chip was served with IEC 62132-4 Direct Power Injection method as an industry standard, in fact, EM immunity of the chip is influenced by their Power Domain Network (PDN). This paper evaluates the EM noise tolerance of a PLL and compares their noise transfer characteristics to the PLL on various PCB boards. To make differences of the PDNs of PCBs, various PCBs with or without LDO and with several types of capacitors are tested. For evaluation of discrepancies between EM characteristics of an IC only and the IC on real boards, the analysis of the noise transfer characteristics according to the PDNs shows that it gives important information for the design having robust EM characteristics. DPI measurement results show that greatly improved immunity of the PLL in the low-frequency region according to using the LDO and a frequency change of the PLL according to the DPI could also check with TEM cell measurement spectrum.

A Study on Temperature Dependent Super-junction Power TMOSFET

  • Lho, Young Hwan
    • Journal of IKEEE
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    • v.20 no.2
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    • pp.163-166
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    • 2016
  • It is important to operate the driving circuit under the optimal condition through precisely sensing the power consumption causing the temperature made mainly by the MOSFET (metal-oxide semiconductor field-effect transistor) when a BLDC (Brushless Direct Current) motor operates. In this letter, a Super-junction (SJ) power TMOSFET (trench metal-oxide semiconductor field-effect transistor) with an ultra-low specific on-resistance of $0.96m{\Omega}{\cdot}cm^2$ under the same break down voltage of 100 V is designed by using of the SILVACO TCAD 2D device simulator, Atlas, while the specific on-resistance of the traditional power MOSFET has tens of $m{\Omega}{\cdot}cm^2$, which makes the higher power consumption. The SPICE simulation for measuring the power distribution of 25 cells for a chip is carried out, in which a unit cell is a SJ Power TMOSFET with resistor arrays. In addition, the power consumption for each unit cell of SJ Power TMOSFET, considering the number, pattern and position of bonding, is computed and the power distribution for an ANSYS model is obtained, and the SJ Power TMOSFET is designed to make the power of the chip distributed uniformly to guarantee it's reliability.

Development of PC-based Auto Inspection System for Smart Battery Protection Circuit Module (PC기반의 스마트 배터리 보호모듈 자동 검사 시스템 개발)

  • Yoon, Tae-Sung;Jang, Gi-Won;Park, Ju-No;Lee, Jeong-Jae
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.275-277
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    • 2005
  • In a lithium-ion battery which is being used in many portable electronic goods, electrolyte is disaggregated and then the gas is happened when electric charging volt is over the 4.5V. So, the pressure on the safety valve is increased and electrolyte is leaked out in the cell. It leads to the risk of explosion. On the other hand, in the case which the battery is discharged excessively, the negative pole is damaged and the performance of the battery is deteriorated. The protection module of a lithium-ion battery is used for preventing such risk and the inspection system is needed to check the performance of such protection module. In this research, a PC-based auto inspection system is developed for the inspection of a battery protection module using Dallas chipset. In the inspection system, AVRl28 chip is used as a controller and the communication protocol is developed for the data communication between the protection module and the AVR128 chip. And GPIB interface is used for the control of measuring devices. Also, MMI environment is developed using LabView for convenient monitoring by the tester.

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A New Placement Algorithm for Gate Array (새로운 게이트 어레이 배치 알고리듬)

  • Kang, Kyung-Ik;Chong, Jong-Wha
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.5
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    • pp.117-126
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    • 1989
  • In this paper, a new placement algorithm for gate array lay out design is proposed. The proposed algorithm can treat the variable-sized macrocells and by considering the I/Q pad locations, the routing between I/Q pads and the internal region of a chip can be automated effectively. The algorithm is composed of 3 parts. which are initial partitioning, initial placement and placement improvement. In the initial placement phase, a given circuit is partitioned into 5 sub-circuits, by clustering method with considers connectivities of cells not only with I/Q pads but also with related partitioned groups is used repeatedly to assign a unique position to each cell. In the placement improvement phase, the concept of probabilistic wiring density is introduced, and cell moving algorithm is proposed to make the density in a chip even.

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A Cell-Network Type SC DC-DC Converter with Large Current Output

  • Eguchi, Kei;Ueno, Fumio;Zhu, Hongbing;Tabata, Toru;Tanoue, Takashi
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1121-1124
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    • 2002
  • In this paper, an IC realization of a cell-network type SC DC-DC converter is reported. To achieve small and low-cost realization, the converter is designed by using a 1.2 $\mu\textrm{m}$ CMOS technology. The CMOS implemented converter will be useful as a building block of various mobile equipments since step-up and step-down voltages can be provided at one time. Concerning the proposed DC-DC converter, SPICE simulatiorls are performed to investigate the characteristics of the circuit. The SPICE simulations show that, the efficiency of the simulated circuit is more than 95 %. From the layout design using a CAD tool, MAGIC, the VLSI chip is fabricated in the chip fabrication program of VLSI Design and Education Center(VDEC), the University of Tokyo with the collaboration by On-Semiconductor. The proposed circuit is integrable by a standard 1.2 $\mu\textrm{m}$ CMOS technology.

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Regulation of RIP3 protein stability by PELI1-mediated proteasome-dependent degradation

  • Park, Han-Hee;Morgan, Michael J.;Kang, Ho Chul;Kim, You-Sun
    • BMB Reports
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    • v.51 no.10
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    • pp.484-485
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    • 2018
  • Receptor-interacting protein kinase-3 (RIP3 or RIPK3) is a serine-threonine kinase largely essential for necroptotic cell death; it also plays a role in some inflammatory diseases. High levels of RIP3 are likely sufficient to activate necroptotic and inflammatory pathways downstream of RIP3 in the absence of an upstream stimulus. For example, we have previously detected high levels or RIP3 in the skin of Toxic Epidermal Necrolysis patients; this correlates with increased phosphorylation of MLKL found in these patients. We have long surmised that there are molecular mechanisms to prevent anomalous activity of the RIP3 protein, and so prevent undesirable cell death and inflammatory effects when inappropriately activated. Recent discovery that Carboxyl terminus of Hsp 70-Interacting Protein (CHIP) could mediate ubiquitylation- and lysosome-dependent RIP3 degradation provides a potential protein that has this capacity. However, while screening for RIP3-binding proteins, we discovered that pellino E3 ubiquitin protein ligase 1 (PELI1) also interacts directly with RIP3 protein; further investigation in this study revealed that PELI1 also targets RIP3 for proteasome-dependent degradation. Interestingly, unlike CHIP, which targets RIP3 more generally, PELI1 preferentially targets kinase active RIP3 that has been phosphorylated on T182, subsequently leading to RIP3 degradation.

A Magneto-optical Trap Below a Dielectric Coated Mirror Surface

  • Yu, Hoon;Lee, Lim;Lee, Kyung-Hyun;Kim, Jung-Bog
    • Journal of the Optical Society of Korea
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    • v.13 no.2
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    • pp.223-226
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    • 2009
  • A Magneto-Optical Trap (MOT) for $^{87}Rb$ atoms near the surface of a dielectric coated mirror at the top of a small $20{\times}25{\times}40\;mm^3$ cell has been observed. Two beams of $3.3\;mW/cm^2$ were used for optical cooling and an anti-Helmholtz magnetic field with a spatial gradient of 9.1 G/cm was used for magnetic trapping. The thickness of the mirror coated on a cover glass was less than $100{\mu}m$. The mirror covered the top of a cell and the atom-chip was located outside the vacuum in order to exploit the long life time of the mirror and easy operation of the chip. The trapping position was found 5 mm beneath the mirror surface. The number of trapped atoms was roughly $3{\times}10^7$ atoms and the temperature was approximately a few tens mK. In this paper, we describe the construction of the mirror-MOT in detail.