• Title/Summary/Keyword: Cell-chip

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Cryogenic Machining of Open-Cell Silicone Foam (액화질소를 이용한 오픈 셀 실리콘 폼의 냉동 절삭조건 최적화)

  • Hwang, Jihong;Cho, Kwang-Hee;Park, Min-Soo
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.23 no.1
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    • pp.32-37
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    • 2014
  • Open-cell silicon foam is difficult to cut using conventional machining processes because of its low stiffness. That is, open-cell silicon foam is easily pressed down when the tool is engaged, which makes it difficult to remove the material in the form of chip. This study proposes an advanced method of machining open-cell silicon foam by freezing the material using liquid nitrogen. Furthermore, the machining conditions are optimized to maximize the efficiency of material removal and minimize the usage of liquid nitrogen by conducting experiments under various machining conditions. The results show that open-cell silicone foam products with free surface can be successfully machined by employing the proposed method.

Performance Improvement and ASIC Design of OAM Function Using Special Cell Field (특별 셀 영역을 이용한 OAM 기능의 성능 향상 및 ASIC 설계)

  • Park, Hyoung-Keun;Kim, Hwan-Yong
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.2
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    • pp.26-36
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    • 1999
  • In this paper, the novel scheme of OAM performance management function is proposed to supply the most of network resources and reliable services by processing data having various QoS(quality of service) in the view of cell loss and cell delay of ATM networks Also, the special fields of OAM cell are defined in order to improve correlate control, operation, and management technique between networks which is required to flexibility and precision control as detecting the performance information of the variable networks periodically. The proposed OAM function, the input/output function of cell, and the interface function of the accessory device which is likely to the memory/CPU are designed to ASIC. The designed chip is carried out the back-end simulation using Verilog-XL simulator of Cadence. In result, it is able to performs an accurate control in $2{\mu}s$.

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Phase Error Accumulation Methodology for On-chip Cell Characterization (온 칩 셀 특성을 위한 위상 오차 축적 기법)

  • Kang, Chang-Soo;Im, In-Ho
    • 전자공학회논문지 IE
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    • v.48 no.2
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    • pp.6-11
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    • 2011
  • This paper describes the design of new method of propagation delay measurement in micro and nanostructures during characterization of ASIC standard library cell. Providing more accuracy timing information about library cell (NOR, AND, XOR, etc.) to the design team we can improve a quality of timing analysis inside of ASIC design flow process. Also, this information could be very useful for semiconductor foundry team to make correction in technology process. By comparison of the propagation delay in the CMOS element and result of analog SPICE simulation, we can make assumptions about accuracy and quality of the transistor's parameters. Physical implementation of phase error accumulation method(PHEAM) can be easy integrated at the same chip as close as possible to the device under test(DUT). It was implemented as digital IP core for semiconductor manufacturing process($0.11{\mu}m$, GL130SB). Specialized method helps to observe the propagation time delay in one element of the standard-cell library with up-to picoseconds accuracy and less. Thus, the special useful solutions for VLSI schematic-to-parameters extraction (STPE), basic cell layout verification, design simulation and verification are announced.

A 2.5-V, 1-Mb Ferroelectric Memory Design Based on PMOS-Gating Cell Structure (PMOS 게이팅 셀 기반 2.5-V, 1-Mb 강유전체 메모리 설계)

  • Kim, Jung-Hyun;Chung, Yeonbae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.1-8
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    • 2005
  • In this paper, a FRAM design style based on PMOS-gating cell structure is described. The memory cell consists of a PMOS access transistor and a ferroelectric capacitor. Its plate is grounded. The proposed scheme employs three novel operating methods: 1) $V_{DD}$ precharged bitline, 2) negative-voltage wordline technique and 3) negative-pulse restore, Because this configuration doesn`t need the on-pitch plate control circuitry, it is effective in realizing cost-effective chip sizes. Implementation for a 2.5-V, 1-Mb FRAM prototype design in a $0.25-{\mu}m$, triple-well technology shows a chip size of $3.22\;mm^{2}$, an access time of 48 ns and an active current of 11 mA. The cell efficiency is 62.52 $\%$. It has gained approximately $20\;\%$ improvement in the cell array efficiency over the conventional plate-driven FRAM scheme.

Computational analysis of large-scale genome expression data

  • Zhang, Michael
    • Proceedings of the Korean Society for Bioinformatics Conference
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    • 2000.11a
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    • pp.41-44
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    • 2000
  • With the advent of DNA microarray and "chip" technologies, gene expression in an organism can be monitored on a genomic scale, allowing the transcription levels of many genes to be measured simultaneously. Functional interpretation of massive expression data and linking such data to DNA sequences have become the new challenges to bioinformatics. I will us yeast cell cycle expression data analysis as an example to demonstrate how special database and computational methods may be used for extracting functional information, I will also briefly describe a novel clustering algorithm which has been applied to the cell cycle data.

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Manipulation of Single Cell for Separation and Investigation

  • Arai, Fumihito;Ichikawa, Akihiko;Maruyama, Hisataka;Motoo, Kouhei;Fukuda, Toshio
    • International Journal of Control, Automation, and Systems
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    • v.2 no.2
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    • pp.135-143
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    • 2004
  • Recently, high throughput screening for microorganisms with desired characteristics from a large heterogeneous population has become possible. Single cell separation has taken on increasing significance in recent years, and several different methods have been proposed so far. In this paper, we introduce several cell manipulation methods aiming at single cell separation and investigation. At first, methods for the separation of microorganisms are classified. Then, we introduce two different approaches, that is, (1) indirect manipulation using laser trapped microtools and (2) thermal gelation.

Bio-inspired Cell Deformability Monitoring Chips Based on Strain Dependent Digital Lysis Rates (미소유로의 길이에 따른 통과세포의 파괴율을 바탕으로 한 생체모사 세포 변형성 검사칩에 관한 연구)

  • Youn, Se-Chan;Lee, Dong-Woo;Cho, Young-Ho
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.32 no.10
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    • pp.844-849
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    • 2008
  • We present a novel cell deformability monitoring chip based on the digitally measured cell lysis rate which is dependent on the areal strain of the cell membrane. This method offers simple cell deformability monitoring by automated high-throughput testing system. We suggest the filter design considering the areal strain imposed on the cell membrane passing through the filter array having gradually increased orifice length. In the experiment using erythrocytes, we characterized the cell deformability in terms of average fracture areal strain which was $0.24{\pm}0.014\;and\;0.21{\pm}0.002$ for normal and chemically treated erythrocytes, respectively. We also verified that the areal strain of 0.15 effectively discriminates the deformability difference of normal and chemically treated erythrocytes, which can be applied to the clinical situation. We compared the lysis rates and their difference for the samples from different donors and found that the present chips can be commonly used without any calibration process. The experimental results demonstrate the simple structure and high performance of the present cell deformability monitoring chips, applicable to simple and cost-effective cell aging process monitoring.

Design of a High-Speed Data Packet Allocation Circuit for Network-on-Chip (NoC 용 고속 데이터 패킷 할당 회로 설계)

  • Kim, Jeonghyun;Lee, Jaesung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.459-461
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    • 2022
  • One of the big differences between Network-on-Chip (NoC) and the existing parallel processing system based on an off-chip network is that data packet routing is performed using a centralized control scheme. In such an environment, the best-effort packet routing problem becomes a real-time assignment problem in which data packet arriving time and processing time is the cost. In this paper, the Hungarian algorithm, a representative computational complexity reduction algorithm for the linear algebraic equation of the allocation problem, is implemented in the form of a hardware accelerator. As a result of logic synthesis using the TSMC 0.18um standard cell library, the area of the circuit designed through case analysis for the cost distribution is reduced by about 16% and the propagation delay of it is reduced by about 52%, compared to the circuit implementing the original operation sequence of the Hungarian algorithm.

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Facile Cell Patterning Based on Selectively Patterned Polydimethylsiloxane (PDMS) and Polyelectrolyte Surface (PDMS와 고분자 전해질 표면을 이용한 간편한 세포 패터닝 방법)

  • Jeong, Heon-Ho;Song, Hwan-Moon;Hwang, Ye-Jin;Hwang, Taek-Sung;Lee, Chang-Soo
    • KSBB Journal
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    • v.24 no.6
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    • pp.515-520
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    • 2009
  • This study presented facile method of cell patterning using fabricated PDMS patterns on polyelectrolyte coated surface. This basic principle is the fabrication of functional surface presenting two orthogonal surfaces such as cell adhesive and repellent properties. Cell adhesive surface was firstly fabricated with simple coating of polyelectrolyte multilayer. And then, the desired patterns of PDMS for the prevention of nonspecific binding of cells were transferred onto the previously formed thin film of polyelectrolyte multilayer. Thus, we could prepare novel functional surface simultaneously containing PDMS and polyelectrolyte region. As expected, the PDMS regions showed effective prevention of nonspecific binding of cell and the other region, exposed polyelectrolyte area, provided cell adhesive environment. The height of formed PDMS structure was about 100 nm. Based on this method, cell patterning can be successfully obtained with various pattern shapes and sizes. Therefore, we expect that this simple method will be useful platform technology for the development of cell chip, cell based assay system, and biochip.

Dosimetric characteristics of an independent collimator system using measurements performed quarter fields. (Tungsten eyeball shield block의 임상적용에 관한 고찰)

  • Jeong, Deok-Yang;Lee, Byoung-Koo;Hwang, Woong-Koo
    • The Journal of Korean Society for Radiation Therapy
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    • v.14 no.1
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    • pp.89-94
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    • 2002
  • During radiation therapy with electron beam to eyelid, we must keep the minimal dose on eyeball as possible. especially in the treatment of Sebaceous gland carcinoma, Squamouse cell ca., and basal cell ca. of eyelid and low grade MALToma etc. But if radiation field covered the upper & lower eyelid, it makes a cataract on lens of treated eye, in late complications. Now we reports the advantages of Tungsten eyeball shielding block compare to previously used lead block. with BOLX-I material, we made a eyeball model and measured the absorbed dose of 6MeV & 9MeV electron hem at 6 point of eyeball model with TLD chip. And compare the absorbed dose to previously lead block and other types of Tungsten eyeball shielding block.

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