• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2002.11a
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• pp.363-368
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• 2002

Performance-based course design on the job of receiving substation installations is presented to achieve a work based curriculum development. It includes a job analysis method called ISD(Instructional Systems Design & Development) and DACUM(Developing a Curriculum) which is designed to accept various requirements of industrial fields. It is provided with course profile, key contents, terminal learning objectives, intermediate learning objectives, instruction strategy, instruction sequence, case study, action learning and lesson plan.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2001.11a
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• pp.151-156
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• 2001

Performance-based course design on the job of receiving substation installations is presented to achieve a work based curriculum development. It includes a job analysis method called ISD(Instructional Systems Design & Development) and DACUM(Developing a Curriculum) which is designed to accept various requirements of industrial fields. It is provided with course profile, key contents, terminal learning objectives, intermediate learning objectives, instruction strategy, instruction sequence, case study, action learning and lesson plan.

• Journal of Computing Science and Engineering
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• v.6 no.4
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• pp.267-278
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• 2012

The state-of-the-art techniques in multicore timing analysis are limited to analyze multicores with shared instruction caches only. This paper proposes a uniform framework to analyze the worst-case performance for both shared instruction caches and data caches in a multicore platform. Our approach is based on a new concept called address flow graph, which can be used to model both instruction and data accesses for timing analysis. Our experiments, as a proof-of-concept study, indicate that the proposed approach can accurately compute the worst-case performance for real-time threads running on a dual-core processor with a shared L2 cache (either to store instructions or data).

• The Journal of Korean Association of Computer Education
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• v.16 no.2
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• pp.49-60
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• 2013

The purpose of this study was to analyze inductively Critical Success Factors of Digital Textbook-Based Instruction based on qualitative research. To accomplish the purpose of the study, D elementary school in Incheon, one of digital textbook model schools, was selected as the school for observation. Three fifth graders and their teacher were interviewed and their six lessons were used for analyzing teaching and learning activities in digital textbook-based instruction. The results of the study, 'the use of systematic strategies based on multimedia features', 'information literacy-related questions and answers', 'specific guidance and help', 'the stability of the physical system and equipment', 'active collaborative learning and interaction', 'individual self-directed learning', 'consideration of emotional/physical changes', 'selection and concentration based upon available resources were identified as critical success factors of digital textbook-based instruction.

• Korean Journal of Health Education and Promotion
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• v.21 no.3
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• pp.101-116
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• 2004

Korea has the highest traffic accident occurrence rate in the world. It means that we are forced to face a tremendous amount of economic loses and great cost of life. Even though this phenomenon consistently has arose as a public issue every year and many researchers have emphasized the importance of safety education as the fundamental solution, we are still trying to make a long-lasting and effective traffic safety education programs for children and adolescents. The purpose of this study was to test the effectiveness of web-based learning for traffic safety in Korea middle school. For this purpose, the instructive model was constructed based on the ASSURE model and a special web-site of education was developed on behalf of practical use of multi-media learning materials for the traffic safety. The research subject was represented by 259 students from second grade in 2 middle schools located in Seoul Korea. The traffic safety education program using web-site was preceded to the 136 students as a case group for 45 minutes total 3 times. Other 126 students are control group those who did not get with this program. The survey was conducted before and after the education. The results of this study were as follow: 1. The knowledge analysis from the comparison between before and after of the lesson showed case group and control group scored average at 11.25 points and 10.97 points. However, after they attended programs, case group scored 13.57 points and control group scored 10.85 points. The difference from the result of the case group was statistically significant(p<0.001). 2. The attitude analysis from the comparison between before and after of the lesson showed case group and control group scored averages at 29.59 points and 28.21 points. However, after they attended program, case group scored 37.23 points and control group scored 32.71 points. The difference from the result of the case group was statistically significant(p<0.05). 3. Regarding the domain analysis by means of web-based traffic safety education, only the case group had a statistically significant score in the case of knowledge 'safe utilization of bicycle' and 'The Characteristic of Automobile and Safer Mode of Walking for Pedestrian'(p<0.01, p< 0.001), and in the case of attitude 'safe walking and crossing' 'The Characteristic of Automobile and Safer Mode of Walking for Pedestrian'(p<0.01, p<0.001). 4. Web based instruction for traffic safety was effective in terms of improving students' knowledge and attitude for traffic safety.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.1
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• pp.57-61
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• 1984

This paper deals with the selection of minimal test instruction set for microprocessor data processing test. This test method is based on a function description of the instructions which are obtained from the data given by the user's manual. Selecting procedure is done in 3 steps: 1) a test execution graphs are represented on the instructions which are grouped functionally, 2) the essential graphs, the eliminable graphs, the eliminable graphs, and the eligible graphs are built, 3) optimal test instruction set from the essential graphs and the eligible graphs is defined. In the case of INTEL 8048, 50 test instructions can be selected optimally from 8048 instruction repertories (96 instructions)

• Journal of the Korea Society for Simulation
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• v.12 no.2
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• pp.45-53
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• 2003

This paper presents a retargetable compiled assembly simulation technique for fast ASIP(application specific instruction processor) simulation. Development of ASIP which satisfies design requirements in various fields of applications such as telecommunication, wireless network, etc. needs formal design methodology and high-performance relevant software environments such as compiler and simulator In this paper, we employ the architecture description language(ADL) named ${HiXR}^2$ to automatically synthesize an instruction-level compiled assembly simulator. A compiled simulation has benefit of time efficiency to interpretive one because it performs instruction fetching and decoding at compile time. Especially, in case of assembly simulation, instruction decoding is usually a time-consuming job(string operation), so the compiled simulation of assembly simulation is more efficient than that of binary simulation. Performance improvement of the compiled assembly simulation based on ${HiXR}^2$ is exemplified with an ARM9 architecture and a CalmRISC32 architecture. As a result, the compiled simulation is about 150 times faster than interpretive one.

• Journal of Korea Society of Digital Industry and Information Management
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• v.13 no.4
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• pp.179-191
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• 2017

The purpose of this study is to investigate the change of comprehension degree about learning satisfaction and capstone class by applying the subject which draws idea for team project task in college to creative capstone design program. The Capstone Design Program is designed to train fieldworkers with creative problem solving skills and is widely applied as a problem-solving course in team-based projects. In this paper, based on the case study of the 'fusion capstone design' operated in the first semester of 2015 ~ 2017, the capstone design course was established in the course of designing ideas for problem solving. The results of this study are as follows: First, the questionnaire about capstone design instruction process, instruction method, and learning achievement satisfaction were analyzed. As a result, understanding of capstone design was found to be higher than that of class before class, and satisfaction of performance course, method of teaching performance and learning outcome were obtained.

• Journal of the Korea Society of Computer and Information
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• v.18 no.11
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• pp.229-240
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• 2013

This study critically review the textbooks and the syllabus of computer network courses currently used at universities, and the specifications of the certifications concerned to provide the students with the competitive and optimized course contents. Considering the vitality of the practicum in the computer network courses, we also suggest a new learning-instruction case study that focuses on the practice by analyzing the computer network practice test simulators which are certified nationally and the internationally. The proposed learning-instruction case study for computer network courses includes the weekly core lessons and contents, study goals and key points, the practice theme, handy tools based on two track of lecture and practice. Therefore it is expected to be a quite resourceful and practical teaching plan for the teacher, and a highly achievement of learning outcomes through motivation which can facilitate CCNA certification enrolling in the field of network aspect for the learner.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.12
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• pp.1564-1574
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• 1999

In order to improve the efficiency of optimizing compilers, integration of register allocation and instruction scheduling has been extensively studied. One of the promising integration techniques is register allocation based on register-reuse chains. However, the generation of register-reuse chains in the previous approach was not completely systematic and consequently it creates unnecessarily dependencies that restrict instruction scheduling. This paper proposes a new register allocation technique based on a systematic generation of register-reuse chains. The first phase of the proposed technique is to generate register-reuse chains that are optimal in the sense that no additional dependencies are created. Thus, register allocation can be done without restricting instruction scheduling. For the case when the optimal register-reuse chains require more than available registers, the second phase reduces the number of required registers by merging the register-reuse chains. Chain merging always generates additional dependencies and consequently enforces the execution order of instructions. A heuristic is developed for the second phase in order to reduce additional dependencies created by merging chains. For matrix multiplication program, the number of registers resulting from the first phase is small enough to fit into available registers for most basic blocks. In addition, it is shown that the restriction to instruction scheduling is reduced by the proposed merging heuristic of the second phase.