• 전력전자학회논문지
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• 제20권4호
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• pp.337-343
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• 2015

The multi-level inverters are highly efficient for high-power and medium-voltage AC driving applications, such as high-speed railway systems and renewable energy resources, because such inverters generate lower total harmonic distortion (THD) and electromagnetic interface (EMI). Lower switching stress occurs on switching devices compared with conventional two-level inverters. Depending on the multi-level inverter topology, the required components and number of switching devices are different, influencing the overall efficiency. Comparative studies of multi-level inverters based on loss analysis and output characteristic are necessary to apply multi-level inverters in high-power AC conversion systems. This paper proposes a theoretical loss analysis method based on piecewise linearization of characteristic curves of power semiconductor devices as well as loss analysis and output performance comparison of five-level neutral-point clamped, flying capacitor inverters, and high-level cascaded H-bridge multi-level inverters.

• Journal of Power Electronics
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• 제13권2호
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• pp.296-303
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• 2013

This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

• 전력전자학회논문지
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• 제11권3호
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• pp.239-246
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• 2006

본 논문에서는 스텝 펄스형의 멀티레벨 인버터에 적용하기 위한 새로운 사인파 변조기법을 제안하고자 한다. 제안된 변조기법은 레벨수의 증가에 무관하게 스위칭 각의 계산이 쉽고, 각각의 스텝에서 이상적인 정현파와 수학적으로 동일한 실효치를 출력하도록 설계되었으며, 높은 출력레벨의 스텝펄스형 멀티레벨 인버터에서 정현파를 근사적으로 추종하는 파형을 생성할 수 있다. 본 논문에서는 셀 전압비를 이용하여 출력 레벨을 확장한 3셀 구조의 13레벨 케스케이드 H-브리지형 멀티레벨 인버터에 대하여 제안된 변조기법을 적용하였으며 시뮬레이션 및 실험을 통하여 확인하였다.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2005년도 전기학술대회논문집
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• pp.1022-1028
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• 2005

This paper is presented the analysis results and simulation results of cascaded H-bridge 7 level inverter with various modulation index. Stepped waveform having number of switching was used to eliminate harmonic components. Switching angles according to modulation index are calculated numerically. Therefore, 3 times of switching with 7 level topology and QWS(Quarter Wave Symmetry) could eliminate 5th and 7th harmonics. The harmonic characteristics are compared to those of space vector modulation method which known as common modulation method in industrial field. Stepped waveform method showed higher ability to reduce, especially lower order of harmonics.

• Journal of Power Electronics
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• 제16권2호
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• pp.490-497
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• 2016

The analysis of the switch status of each unit module of a cascaded multi-level inverter reveals that the working condition of the switch of a chopper arm causes unnecessary switching under the conventional unipolar sinusoidal pulse width modulation (SPWM). With an increase in the number of cascaded multilevel inverters, the superposition of unnecessary switching gradually occurs. In this work, we propose an improved SPWM strategy to reduce switching in cascaded multilevel inverters. Specifically, we analyze the switch state of the switch tube of a chopper arm of an H-bridge unit. The redundant switch is then removed, thereby reducing the switching frequency. Unlike the conventional unipolar SPWM technique, the improved SPWM method greatly reduces switching without altering the output quality of inverters. The conventional unipolar SPWM technique and the proposed method are applied to a five-level inverter. Simulation results show the superiority of the proposed strategy. Finally, a prototype is built in the laboratory. Experimental results verify the correctness of the proposed modulation strategy.

• Journal of Power Electronics
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• 제15권6호
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• pp.1508-1516
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• 2015

A single phase H-bridge inverter is employed in conventional Inductive Power Transfer (IPT) systems as the primary side power supply. These systems may not be suitable for some high power applications, due to the constraints of the power electronic devices and the cost. A high-frequency cascaded multi-level inverter employed in IPT systems, which is suitable for high power applications, is presented in this paper. The Phase Shift Pulse Width Modulation (PS-PWM) method is proposed to realize power regulation and selective harmonic elimination. Explicit solutions against phase shift angle and pulse width are given according to the constraints of the selective harmonic elimination equation and the required voltage to avoid solving non-linear transcendental equations. The validity of the proposed control approach is verified by the experimental results obtained with a 2kW prototype system. This approach is expected to be useful for high power IPT applications, and the output power of each H-bridge unit is identical by the proposed approach.

• Journal of Power Electronics
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• 제16권1호
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• pp.173-181
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• 2016

In this paper, a new technique for harmonic optimization in cascaded H-bridge 7-level inverters is proposed. The suggested strategy is based on minimizing an objective function which simultaneously optimizes the converter utilization and Total Harmonic Distortion (THD). The Switch Utilization Ratio (SUR) is formulized for both the phase and line-line voltages of a 7-level inverter and is considered in the final objective functions. Based upon the SUR formula, utilization ratio enhancement will reduce the value of feeding DC links, which improves the efficiency and lifetime of the circuit components due to lower voltage stresses and losses. In order to achieve more effective solution in different modulation indices, it is assumed that the DC sources can be altered. Experimental validation is presented based on a three-phase 7-level inverter prototype.

• 전력전자학회논문지
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• 제8권6호
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• pp.478-487
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• 2003

본 논문에서는 고압 대용량 전동기 구동용 멀티레벨 인버터의 종류 및 특징을 간략히 살펴보고, 특히 입출력 전력품질이 우수하고 전압별 시리즈화가 용이한 H-브릿지 멀티레벨 인버터의 구조적 특징 및 장점을 기술하였다. 연구 개발된 3,300V lMVA 용량의 Cascaded H-브릿지 멀티레벨 인버터의 구체적인 전력회로 구조 및 설계방법, 제어기 구성 그리고 PWM 기법을 제시하였다. 또한, 실용량의 시험을 통해 H-브릿지 멀티레벨 인버터는 출력 전압 Step이 여러 단계이고 dv/dt가 적으며 입력단 THD를 크게 낮출 수 있어 성능 면에서도 여타 방식보다 우수함을 입증하였다. 또한 생산적인 측면에서도 저압 소자를 사용하여 설계하므로 기존의 생산/시험 기술과 설비를 이용할 수 있어 매우 경제적이며 Power Cell 단위 결합 구조이므로 신뢰성 측면이나 보수/유지 측면에서도 유리하다는 결론을 얻었다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.270-271
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• 2017

Cascaded NPC/H-bridge 인버터의 기존 Level-Shift PWM에서는 한 stack에서 전력 및 손실 불균형이 발생하게 된다. 이에 따라 손실 불균형을 개선하기 위해 새로운 Level Shift PWM을 개발하였고, PSIM 9.14를 통해 기존의 PWM 기법들과 비교 분석 하였다.

• 전력전자학회논문지
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• 제9권4호
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• pp.334-340
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• 2004

본 논문에서는 캐스케이드 변압기를 이용하는 멀티레벨 인버터의 변압기 크기를 동일화시키기 위한 효과적인 스위칭 패턴을 제안한다. 제안된 스위칭 방식은 기존의 SHEPWM 스위칭 방식을 기초로 하여 각 변압기에 인가되는 최대 자속을 동일하게 함으로서 캐스케이드 변압기의 위치에 상관없이 동일한 설계가 가능하다. 따라서 동일한 풀-브리지 모듈의 이용이 가능하고, 모듈화 특성을 개선시키며, 제작의 용이성을 쾌할 수 있다. 제안된 스위칭 기법의 기본 아이디어를 이론적으로 분석하며, 타당성을 실험을 통하여 입증한다.