• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6C
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• pp.502-511
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• 2012

As the importance of GNSS system increases, the necessity of independent system is increased also. When the independent GNSS system is required, GNSS signal design is necessary with requirement definition. This paper suggests the design method of GNSS signal using the analysis result of receiver performance. First, the candidates are defined based on the design elements. Then the receiver performance of the candidates is analyzed based on the performance evaluation parameters. The weights of performance evaluation parameter are defined in order to consider the receiver performance in a various aspects. Finally, the calculation of normalized performance evaluation parameters and weights are derived to obtain the compared value for signal selection. Spreading code, modulation method and carrier frequency are considered as design parameters. Also, correlation width, DLL PLL thermal noise jitter, frequency bandwidth and side lobe peak ratio are considered as performance evaluation parameters. And positioning performance, robustness to noise, bandwidth efficiency are considered as the performance aspects. This paper analyzes the performance of each candidate using software based simulator and suggest the method to compare objectively the performance of each candidates.

• Journal of the Korean Vacuum Society
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• v.6 no.2
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• pp.136-142
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• 1997

An/n-GaAs(100) Schottky barrier diode has been investigated by using electoreflectance(ER). From the observed Franz-Keldysh oscillatins(FKO), the internal electric field(Ei) of the sample is $5.76\times 10^{4}$V/cm at 300 K. As the modulation voltage($V_{ac}$) IS changed, the line shape of ER signal does not change but its amplitude various linerly. For increasing forward and reverse dc bias boltage($V_{bias}$), the amplitude of ER signal decreases. The internal electric field decreased from $19.3\times 10^4\sim4.39\times10^4$V/cm as $V_{bias}$ INCREASES FROM -5.0 V TO 0.6 V. For Au/n-GaAs the valve of built-in voltage($V_{bi}$) determined from the plot of $V_{bias}$ versus $E_i^2$ is 0.70 V. This value agrees with that observed in the plot of $V_{bias}$ versus amplitude of FKO peak. In addition, the carrier concentraion(N) and potential barrier($\Phi$) of the sample at 300 K are found to be about $2.4\times 10^{16}\textrm{cm}^{-3}$ and 0.78 eV, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.761-768
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• 2010

This paper presents an effective method to achieve the wideband waveform for high resolution SAR(Synthetic Aperture Radar) using the frequency multiplication technique. And also this paper analyzes the root causes for the spectral regrowth due to 3rd-order intermodulation in chirp bandwidth expansion scheme using quadrature modulator and frequency multipliers. The amplitude and phase imbalance requirement are defined based on the simulation results in terms of quadrature channel imbalance. This minimizes the degradation of range resolution, peak sidelobe ratio and integrated sidelobe ratio. The wideband chirp generator using the frequency multiplier and memory map scheme was manufactured and the compensation technique was presented to reduce the spectral regrowth of SAR waveform by minimizing the amplitude and phase imbalance. After I and Q channel imbalance adjustment, the carrier level reduces －28.7 dBm to －53.4 dBm. Chirp signal with 150 MHz bandwidth at S-band expands to 600 MHz bandwidth at X-band. The sidelobe levels are reduced by about 8 to 9 dB by compensating the amplitude balance between I and Q channels.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.2
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• pp.430-439
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• 2004

This paper describes a design of 8192/2048-point FFT/IFFT processor (CFFT8k2k), which performs multi-carrier modulation/demodulation in OFDM-based DVB-T receiver. Since a large size FFT requires a large buffer memory, two design techniques are considered to achieve memory-efficient implementation of 8192-point FFT/IFFT. A hybrid structure, which is composed of radix-4 single-path delay feedback (R4SDF) and radix-4 single-path delay commutator (R4SDC), reduces its memory by 20% compared to R4SDC structure. In addition, a memory reduction of about 24% is achieved by a novel two-step convergent block floating-point scaling. As a result, it requires only 57% of memory used in conventional design, reducing chip area and power consumption. The CFFT8k2k core is designed in Verilog-HDL, and has about 102,000 Bates, RAM of 292k bits, and ROM of 39k bits. Using gate-level netlist with SDF which is synthesized using a $0.25-{\um}m$ CMOS library, timing simulation show that it can safely operate with 50-MHz clock at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-${\mu}\textrm{s}$. The functionality of the core is fully verified by FPGA implementation, and the average SQNR of 60-㏈ is achieved.

• Korean Journal of Optics and Photonics
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• v.9 no.5
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• pp.333-341
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• 1998

The novel integrated device, 1.55 ${\mu}{\textrm}{m}$ DR-LD(distrbuted reflector laser diode) integrated EA-MOD (electro-absorption modulator) as light source, is proposed to improve the device yield and its operational performances. This device can be easily fabricated by the selective MOVPE technique and its fabrication processes are almost the same as the reported 1.55 ${\mu}{\textrm}{m}$ DFB-LD(distributed feedback laser diode) integrated EA-MOD except the asymmetric gratings. The static and dynamic properties are investigated simultaneously by solving the transfer matrix method for light propagation, the time-dependent rate equation for carrier change and schr$\"{o}$dinger equation for QCSE (Quantum-Confined Stark Effect). The performances of the proposed device such as output power, chirp, and extinction ratio are compared with those of DFB-LD integrated EA-MOD. Under 10Gb/s NRZ modulation, we obtain that DR-LD integrated EA-MOD. is 30% higher in output power on the on-state, about 50% lower in chirp, and slightly larger in extinction ratio than DFB-LD integrated EA-MOD.-MOD.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.3
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• pp.229-235
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• 2019

The implementation of an in-band full-duplex wireless communication system is demonstrated in this study. In the analog/RF domain, the self-interference(SI) signal is reduced using a separate antenna for the transmitter and receiver paths, and most of the SI signal is canceled in the digital domain. A software defined radio(SDR) is used to implement the in-band full-duplex wireless communication system. The USRP X310 device uses transmitting and receiving antennas. By adjusting the gain of the transmitting and receiving ends of the SDR device, the magnitude of the SI signal entering the receiving antenna, and the size of the received signal from the outside, are both set to -64 dB. To verify the in-band full-duplex wireless communication performance, the source data is image and orthogonal frequency-division multiplexing is used for modulation. A WiFi standard frame with a carrier frequency of 2.67 GHz and bandwidth of 20 MHz is used. In the received signal, the SI signal is canceled by digital signal processing and the SI signal is attenuated by up to 34 dB. OFDM demodulation was impossible when the SI signal was not removed. However, the bit error rate is reduced to $2.63{\times}10^{-5}$ when the SI signal is attenuated by 34 dB, and no error is detected in the 100 Mbit data output as a result of passing through the Viterbi decoder.

• Journal of Korea Water Resources Association
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• v.57 no.5
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• pp.347-357
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• 2024

Numerous prior studies have delineated the size distribution of noncohesive sediment in suspension, focusing on mean size and standard deviation. However, suspensions comprise a heterogeneous mixture of sediment particles of varying sizes. The transport dynamics of suspended sediment in turbulent flow are intimately tied to settling velocities calculated based on size and density. Consequently, understanding the grain size distribution becomes paramount in comprehending sediment transport phenomena for noncohesive sediment. This study aims to introduce a straightforward modeling approach for simulating the grain size distribution of suspended sediment amidst turbulence. Leveraging insights into the contrast between cohesive and noncohesive sediment, we have meticulously revised a stochastic flocculation model originally designed for cohesive sediment to aptly simulate the grain size distribution of noncohesive sediment in suspension. The efficacy of our approach is corroborated through a meticulous comparison between experimental data and the grain size distribution simulated by our newly proposed model. Through numerical simulations, we unveil that the modulation of grain size distribution of suspended sediment is contingent upon the sediment transport capacity of the carrier fluid. Hence, we deduce that our simplified approach to simulating the grain size distribution of suspended sediment, integrated with a sediment transport model, serves as a robust framework for elucidating the pivotal bulk properties of sediment transport.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.880-886
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• 2007

We have proposed a new "hybrid" envelope elimination and restoration(EER) transmitter architecture using an efficiency optimized power amplifier(PA) and modified bias modulator. The efficiency of the PA at the average drain voltage is very important for the overall transmitter efficiency because the PA operates mostly at the average power region of the modulation signal. Accordingly, the efficiency of the PA has been optimized at the region. Besides, the bias modulator has been accompanied with the emitter follower for the minimization of memory effect. A saturation amplifier, class $F^{-1}$ is built using a 5-W PEP LDMOSFET for forward-link single-carrier wideband code-division multiple-access(WCDMA) at 1-GHz. For the interlock experiment, the bias modulator has been built with the efficiency of 64.16% and peak output voltage of 31.8 V. The transmitter with the proposed PA and bias modulator has been achieved an efficiency of 44.19%, an improvement of 8.11%. Besides, the output power is enhanced to 32.33 dBm due to the class F operation and the PAE is 38.28% with ACLRs of -35.9 dBc at 5-MHz offset. These results show that the proposed architecture is a very good candidate for the linear and efficient high power transmitter.