• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.45-46
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• 2012

본 논문에서는 멀티레벨 인버터에서 발생하는 DC Link 단의 커패시터 불 평형 문제를 해결하고자 새로운 DC 전압 균형을 위한 스위칭 방식에 대해 제안한다. 제안한 방식은 DC-Link 단에 위치한 각각의 커패시터들의 전압을 센싱하고 이를 PI제어를 통해 스위칭 신호를 제어함으로써 각각의 커패시터에 걸리는 전압을 균일하게 만듦으로써, 커패시터단의 전압 불 평형을 개선하였으며, 이를 3상 2레벨 멀티-레벨 인버터를 이용한 시뮬레이션 결과를 통해 본 논문의 타당성을 검증하였다.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.202-207
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• 1997

Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.1
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• pp.61-69
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• 2005

The topology of NPC inverter coupled with the large number of devices used increases the probability of device failure. It's necessary to develop an optimal remedial strategy which can be used to continue the application when fault occurs. The fault tolerance is obtained by the use of the proposed method. The proposed method utilizes that the one phase load with the failed power device could be connected to the center-tap of the DC-link capacitor in order to dc-link voltage with balance and the sinusoidal phase current with constant amplitude under the single power device fault condition. The strategy described in this paper is expected to provide an economic alternative to more expensive redundancy techniques.

• Journal of Power Electronics
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• v.14 no.3
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• pp.519-530
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• 2014

A novel simplified pulse width modulation(PWM) strategy for neutral point clamped (NPC) three-level converter is proposed in this paper.The direct output voltage modulation is applied to reduce the calculation time. Based on this strategy, several optimized control methods are proposed. The neutral point potential balancing algorithm is discussed and a fine neutral point potential balancing scheme is introduced. Moreover, the minimum pulse width compensation and switching losses reduction can be easily achieved using this modulation strategy. This strategy also gains good results even with the unequal DC link capacitor. The modulation principle is studied in detail and the validity of this simplified PWM strategy is experimentally verified in this paper. The experiment results indicated that the proposed PWM strategy has excellent performance, and the neutral point potential can be balanced well with unequal DC link captaincies.