• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.11 no.3
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• pp.88-96
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• 1997

This paper analyzes the transients for parameters on electrical distribution system. We analyze the voltage sag and switching surge caused by reclosing and develope a distribution system model of multiground type using a practical data of 22.9(kV) distribution system. It is at customer that we analyze an affecting of reclosing through EMTP (Electromagnetic Transients Program) simulation, present transient phenomena on fault line and parallel line. Also. we analyze the various parameters affecting this phenomena in detail through parametric analysis. These factors include the fault location, load size, load power factor, capacitor bank size, and reclosing angle. And relation between these parameters and transient phenomena is presented.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.217-218
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• 2008

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1256-1267
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• 2016

Distributed stray inductance exerts a significant influence on the turn-off voltages of power switching devices. Therefore, the design of low stray inductance bus bars has become an important part of the design of high-power converters. In this study, we first analyze the operational principle and switching transient of a T-type converter. Then, we obtain the commutation circuit, categorize the stray inductance of the circuit, and study the influence of the different types of stray inductance on the turn-off voltages of switching devices. According to the current distribution of the commutation circuit, as well as the conditions for realizing laminated bus bars, we laminate the bus bar of the converter by integrating the practical structure of a capacitor bank and a power module. As a result, the stray inductance of the bus bar is reduced, and the stray inductance in the commutation circuit of the converter is reduced to more than half. Finally, a 10 kVA experimental prototype of a T-type converter is built to verify the effectiveness of the designed laminated bus bar in restraining the turn-off voltage spike of the switching devices in the converter.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1070-1072
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• 2001

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator, in our project, we develop the power quality compensator of 150kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power qualify problems[1,2]. As a series and shunt compensator, power quality compensator consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage qualify in the series part. In this paper we present the design and control algorithm of power quality compensator. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• Proceedings of the KIEE Conference
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• summer
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• pp.351-353
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• 2004

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator. in our project, we develop the UPQC(Unfied Power Quality Compensator of 45kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power quality $problems^{[1-3]}$ As a series and shunt compensator, UPQC consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage quality in the series part. In this paper, we present the design and control algorithm for 4SkVA UPQC system. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• Proceedings of the KIEE Conference
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• 2002.07a
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• pp.551-553
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• 2002

The cubicle type GIS rated at 25.8kV has been designed and manufactured by Jinkwang E&C eacently with their own technologies and KERI's assistances. The C-GIS has been tested to check the design capability for reference before conducting the type test. The operating characteristics test, short time withstand current and peak withstand current test, basic short circuit test duty T60 for preconditioning test, cable charging current switching test, capacitor bank current switching test, basic short circuit test duty T100s and T100a, single phase earth fault test, double earth fault test has been conducted. The test results show that the design and the manufacturing of the C-GIS has an enough capability to pass through the type test except the occurrence of 2 NSDDs in the cable charging current switching test and the instability of opening time at the minimum operating voltage. The problems shown in the tests will be improved soon and the successful pass will be expected in the following type test.

• International journal of advanced smart convergence
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• v.9 no.1
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• pp.172-176
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• 2020

The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.267-273
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• 2007

A fractional-N frequency synthesizer supports quadruple bands and multiple standards for mobile broadcasting systems. A novel linearized coarse tuned VCO adopting a pseudo-exponential capacitor bank structure is proposed to cover the wide bandwidth of 65%. The proposed technique successfully reduces the variations of KVCO and per-code frequency step by 3.2 and 2.7 times, respectively. For the divider and prescaler circuits, TSPC (true single-phase clock) logic is extensively utilized for high speed operation, low power consumption, and small silicon area. Implemented in $0.18-{\mu}m$ CMOS, the PLL covers $154{\sim}303$ MHz (VHF-III), $462{\sim}911$ MHz (UHF), and $1441{\sim}1887$ MHz (L1, L2) with two VCO's while dissipating 23 mA from 1.8 V supply. The integrated phase noise is 0.598 and 0.812 degree for the integer-N and fractional-N modes, respectively, at 750 MHz output frequency. The in-band noise at 10 kHz offset is -96 dBc/Hz for the integer-N mode and degraded only by 3 dB for the fractional-N mode.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.108-108
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• 2010

We have generated Ne-Xe plasma in dense plasma focus device with hypocycloidal pinch for extreme ultraviolet (EUV) lithography and investigated an electron temperature. We have applied an input voltage 4.5 kV to the capacitor bank of 1.53 uF and the diode chamber has been filled with Ne-Xe(30%) gas in accordance with pressure. If we assumed that the focused plasma regions satisfy the local thermodynamic equilibrium (LTE) conditions, the electron temperature of the hypocycloidal pinch plasma focus could be obtained by the optical emission spectroscopy (OES). The electron temperature has been measured by Boltzmann plot. The light intensity is proportion to the Bolzman factor. We have been measured the electron temperature by observation of relative Ne-Xe intensity. The EUV emission signal whose wavelength is about 6~16 nm has been detected by using a photo-detector (AXUV-100 Zr/C, IRD) and the line intensity has been detected by using a HR4000CG Composite-grating Spectrometer.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.349-352
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• 2001

FACTS technology is developed into the sophisticated system technology which combines conventional power system technology with power electronics, micro-process control, and information technology. Its objectives are achieving enhancement of the power system flexibility and maximum utilization of the power transfer capability through improvements of the system reliability, controllability, and efficiency [1]. As a series and shunt compensator, UPFC consists of two inverters with common dc link capacitor bank. It controls the magnitude of shunt bus voltage and real and reactive power flow of transmission line[2]. In this paper, we present the design, implementation and test results of developed 20kVA level prototype UPFC. It is applied to power system simulator and controls the real and reactive power flow and shunt bus voltage magnitude.