• Title/Summary/Keyword: CPU frequency scaling

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Limiting CPU Frequency Scaling Considering Main Memory Accesses (주메모리 접근을 고려한 CPU 주파수 조정 제한)

  • Park, Moonju
    • KIISE Transactions on Computing Practices
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    • v.20 no.9
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    • pp.483-491
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    • 2014
  • Contemporary computer systems exploits DVFS (Dynamic Voltage/Frequency Scaling) technology for balancing performance and power consumption. The efficiency of DVFS depends on how much performance we get for larger power consumption due to elevated CPU frequency. Especially for memory-bounded applications, higher CPU frequency often does not result in higher performance. In this paper, we present an upper bound of CPU frequency scaling based on memory accesses. It is observed that the performance gain due to higher CPU frequency is limited by memory accesses (last level cache misses) per instructions by experiments. Using the results, we present the CPU frequency upper bound with little performance gain. Experimental results show that for a memory-bounded application, applying the frequency upper bound enhances the energy efficiency of the application by above 30%.

Evaluating Power Consumption and Real-time Performance of Android CPU Governors (안드로이드 CPU 거버너의 전력 소비 및 실시간 성능 평가)

  • Tak, Sungwoo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.12
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    • pp.2401-2409
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    • 2016
  • Android CPU governors exploit the DVFS (Dynamic Voltage Frequency Scaling) technique. The DVFS is a power management technique where the CPU operating frequency is decreased to allow a corresponding reduction in the CPU supply voltage. The power consumed by a CPU is approximately proportional to the square of the CPU supply voltage. Therefore, lower CPU operating frequency allows the CPU supply voltage to be lowered. This helps to reduce the CPU power consumption. However, lower CPU operating frequency increases a task's execution time. Such an increase in the task's execution time makes the task's response time longer and makes the task's deadline miss occur. This finally leads to degrading the quality of service provided by the task. In this paper, we evaluated the performance of Android CPU governors in terms of the power consumption, tasks's response time and deadline miss ratio.

Performance Evaluation of Job Scheduling Techniques Incorporating the Ondemand Governor Policy (온디맨드 거버너 정책에 따른 작업 스케줄링 기법의 성능 평가)

  • Tak, Sungwoo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.9
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    • pp.2213-2221
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    • 2015
  • The ondemand governor used in android-based smartphone platforms is a CPU frequency scaling technique. The ondemand governor sets the CPU operating frequency depending on the CPU utilization rate. Job scheduling affects the CPU utilization rate. The power consumption is proportional to the value of operating frequency. Consequently, CPU frequency scaling and CPU utilization rate have an effect on power consumption in a smartphone. In this paper, we evaluated the performance of job scheduling techniques incorporating the ondemand governor in terms of CPU utilization, power consumption, and job deadline miss ratio.

ETS: Efficient Task Scheduler for Per-Core DVFS Enabled Multicore Processors

  • Hong, Jeongkyu
    • Journal of information and communication convergence engineering
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    • v.18 no.4
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    • pp.222-229
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    • 2020
  • Recent multi-core processors for smart devices use per-core dynamic voltage and frequency scaling (DVFS) that enables independent voltage and frequency control of cores. However, because the conventional task scheduler was originally designed for per-core DVFS disabled processors, it cannot effectively utilize the per-core DVFS and simply allocates tasks evenly across all cores to core utilization with the same CPU frequency. Hence, we propose a novel task scheduler to effectively utilize percore DVFS, which enables each core to have the appropriate frequency, thereby improving performance and decreasing energy consumption. The proposed scheduler classifies applications into two types, based on performance-sensitivity and allows a performance-sensitive application to have a dedicated core, which maximizes core utilization. The experimental evaluations with a real off-the-shelf smart device showed that the proposed task scheduler reduced 13.6% of CPU energy (up to 28.3%) and 3.4% of execution time (up to 24.5%) on average, as compared to the conventional task scheduler.

A Dynamic Frequency Controlling Technique for Power Management in Existing Commercial Microcontrollers

  • Lueangvilai, Attakorn;Robertson, Christina;Martinez, Christopher J.
    • Journal of Computing Science and Engineering
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    • v.6 no.2
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    • pp.79-88
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    • 2012
  • Power continues to be a driving force in central processing units (CPU) design. Most of the advanced breakthroughs in power have been in a realm that is applicable to workstation CPUs. Advanced power management systems will manage temperature, dynamic voltage scaling and dynamic frequency scaling in a CPU. The use of power management systems for microcontrollers and embedded CPUs has been modest, and mostly focuses on very large scale integration (VLSI) level optimizations compared to system level optimizations. In this paper, a dynamic frequency controlling (DFC) technique is introduced, to lay the foundation of a system level power management system for commercial microcontrollers. The DFC technique allows a commercial microcontroller to have minor modifications on both the hardware and software side, to allow the clock frequency to change to save power; results in this study show a 10% savings. By adding an additional layer of software abstraction at the interrupt level, the microcontroller can operate without having knowledge of the current clock frequency, and this can be accomplished without having to use an embedded operating system.

Optimization Techniques for Power-Saving in Real-Time IoT Systems using Fast Storage Media (고속 스토리지를 이용한 실시간 IoT 시스템의 전력 절감 최적화 기술)

  • Yoon, Suji;Park, Heejin;Cho, Kyungwoon;Bahn, Hyokyung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.6
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    • pp.71-76
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    • 2021
  • Recently, as the size of IoT data grows, the memory power consumption of real-time systems increases rapidly. This is because real-time systems always place entire tasks in memory, which increases the demand of DRAM significantly. In this paper, we adopt emerging fast storage media and move a certain portion of real-time tasks from DRAM to storage. The part of tasks in storage are, then, loaded into memory when they are actually used. We incorporate our memory/storage power-saving into the dynamic voltage/frequency scaling of processors, thereby optimizing power consumptions in CPU and memory simultaneously. Specifically, the proposed technique aims at minimizing the CPU idle time and the DRAM memory size by determining appropriate voltage modes of CPU and the swap ratio of memory, without violating the deadlines of all tasks. Through simulation experiments, we show that the proposed technique significantly reduces the power consumption of real-time systems.

Energy-aware Dynamic Frequency Scaling Algorithm for Polling based Communication Systems (폴링기반 통신 시스템을 위한 에너지 인지적인 동적 주파수 조절 알고리즘)

  • Cho, Mingi;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.9
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    • pp.1405-1411
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    • 2022
  • Power management is still an important issue in embedded environments as hardware advances like high-performance processors. Power management methods such as DVFS control CPU frequencies in an adaptive manner for efficient power management in polling-based I/O programs such as network communication. This paper presents the problems of the existing power management method and proposes a new power management method. Through this, it is possible to reduce electric consumption by increasing the polling cycle in situations where the frequency of data reception is low, and on the contrary, in situations where data reception is frequent, it can operate at the maximum frequency without performance degradation. After implementing this as a code layer on the embedded board and observing it through Atmel's Power Debugger, the proposed method showed a performance improvement of up to 30% in energy consumption compared to the existing power management method.

Interrupt Processing in Dynamic Frequency Scaling Processor System (동적 프리퀀시 스케일링을 사용한 프로세서의 인터럽트 처리와 I/O 시스템 성능 향상 기법)

  • Yoo See-Hwan;Yoo Chuck
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.06a
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    • pp.328-330
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    • 2006
  • 동적 전력 관리 기법을 활용한 프로세서의 등장은 고성능 임베디드 장치들의 저전력 설계에 있어서 큰 영향을 주고 있다 특히, XSCALE과 같은 고성능 프로세서의 소비전력은 동작 클럭의 속도와 비례하여 빠르게 증가하고 있으며, 이를 극복하기 위한 다양한 기법이 제시되었다. 동적 전력 관리 기법은 크게 1) 동적 전압 관리 기법과 동적 프리퀀시 관리 기법으로 구분된다. 동적 프리퀀시 관리 기법을 사용한 프로세서는 필요에 따라 프로세서의 동작 클럭 속도를 변경한다. 이는 전체적인 프로세서 성능의 저하를 수반하게 된다 특히, 주변 장치들의 전력 관리가 동시에 이루어지지 않을 경우에는 시스템의 전체적인 성능에 큰 영향을 끼치게 된다. I/O 장치의 인터럽트는 CPU의 현재 실행을 잠시 멈추고, 인터럽트 처리를 우선적으로 수행하도록 한다. 따라서 CPU가 처리할 수 있는 양보다 많은 인터럽트 발생은 인터럽트 처리 이후에 실제 응용 프로그램들이 동작할 시간을 줄이게 되어 CPU는 살아있으나, 인터럽트 이외의 실제 프로세스 실행을 진행할 수 없는 라이브륵(livelock) 현상이 발생한다. 동적 프리퀀시 스케일링을 사용하는 경우, 프로세서의 동작 속도 저하로 인한 livelock 현상이 발생할 수 있으며 이를 막기 위하여, 인터럽트 처리를 제한하는 기법을 제시한다.

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An Application-Specific and Adaptive Power Management Technique for Portable Systems (휴대장치를 위한 응용프로그램 특성에 따른 적응형 전력관리 기법)

  • Egger, Bernhard;Lee, Jae-Jin;Shin, Heon-Shik
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.8
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    • pp.367-376
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    • 2007
  • In this paper, we introduce an application-specific and adaptive power management technique for portable systems that support dynamic voltage scaling (DVS). We exploit both the idle time of multitasking systems running soft real-time tasks as well as memory- or CPU-bound code regions. Detailed power and execution time profiles guide an adaptive power manager (APM) that is linked to the operating system. A post-pass optimizer marks candidate regions for DVS by inserting calls to the APM. At runtime, the APM monitors the CPU's performance counters to dynamically determine the affinity of the each marked region. for each region, the APM computes the optimal voltage and frequency setting in terms of energy consumption and switches the CPU to that setting during the execution of the region. Idle time is exploited by monitoring system idle time and switching to the energy-wise most economical setting without prolonging execution. We show that our method is most effective for periodic workloads such as video or audio decoding. We have implemented our method in a multitasking operating system (Microsoft Windows CE) running on an Intel XScale-processor. We achieved up to 9% of total system power savings over the standard power management policy that puts the CPU in a low Power mode during idle periods.

Augmented Reality based Low Power Consuming Smartphone Control Scheme

  • Chung, Jong-Moon;Ha, Taeyoung;Jo, Sung-Woong;Kyong, Taehyun;Park, So-Yun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.10
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    • pp.5168-5181
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    • 2017
  • The popularity of augmented reality (AR) applications and games are in high demand. Currently, the best common platform to implement AR services is on a smartphone, as online games, navigators, personal assistants, travel guides are among the most popular applications of smartphones. However, the power consumption of an AR application is extremely high, and therefore, highly adaptable and dynamic low power control schemes must be used. Dynamic voltage and frequency scaling (DVFS) schemes are widely used in smartphones to minimize the energy consumption by controlling the device's operational frequency and voltage. DVFS schemes can sometimes lead to longer response times, which can result in a significant problem for AR applications. In this paper, an AR response time monitor is used to observe the time interval between the AR image input and device's reaction time, in order to enable improved operational frequency and AR application process priority control. Based on the proposed response time monitor and the characteristics of the Linux kernel's completely fair scheduler (CFS) (which is the default scheduler of Android based smartphones), a response time step control (RSC) scheme is proposed which adaptively adjusts the CPU frequency and interactive application's priority. The experimental results show that RSC can reduce the energy consumption up to 10.41% compared to the ondemand governor while reliably satisfying the response time performance limit of interactive applications on a smartphone.