• Journal of the Korea Society of Computer and Information
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• v.19 no.2
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• pp.39-48
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• 2014

In this paper, we propose an efficient dynamic workload balancing strategy which improves the performance of high-performance computing system. The key idea of this dynamic workload balancing strategy is to minimize execution time of each job and to maximize the system throughput by effectively using system resource such as CPU, memory. Also, this strategy dynamically allocates job by considering demanded memory size of executing job and workload status of each node. If an overload node occurs due to allocated job, the proposed scheme migrates job, executing in overload nodes, to another free nodes and reduces the waiting time and execution time of job by balancing workload of each node. Through simulation, we show that the proposed dynamic workload balancing strategy based on CPU, memory improves the performance of high-performance computing system compared to previous strategies.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.39 no.1
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• pp.1-13
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• 2002

In Distributed Batch-processing Systems (DBSs), CPU-intensive jobs are automatically transferred and executed using idle computers across a network, there by increasing the resource usage and throughput. To be successful, the systems must guarantee the scalablility, fault-tolerance, and flexibility of dynamic configurations. In practice, however, it is very difficult to provide such capabilities in a non-deterministic environment in which the available set of resources is unpredictable because of network failures, computer failures, or voluntary withdrawal from a pool by a machine owner. In this paper, we present the design and implementation of the J-JDBS (Jini-based Java Distributed Batch-processing System) system which is based on the core Jini services like Discovery service, Lookup service, Lease service and etc. We show that the Jini core services can be very effectively used to build reliable, scalallle, fault-tolerant, and flexible DBS systems with little effort.

• The KIPS Transactions:PartA
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• v.12A no.2 s.92
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• pp.151-160
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• 2005

The exponential growth of Web users requires the web serves with high expandability and reliability. It leads to the excessive transmission traffic and system overload problems. To solve these problems, cluster systems are widely studied. In conventional cluster systems, when the request size is large owing to such types as multimedia and CGI, the particular server load and response time tend to increase even if the overall loads are distributed evenly. In this paper, a cluster system is proposed where each Web server in the system has different contents and loads are distributed efficiently using the Web server resource information such as CPU, memory and disk utilization. Web servers having different contents are mutually connected and managed with a network file system to maintain information consistency required to support resource information updates, deletions, and additions. Load unbalance among contents group owing to distribution of contents can be alleviated by reassignment of Web servers. Using a simulation method, we showed that our method shows up to $50\%$ about average throughput and processing time improvement comparing to systems using each LC method and RR method.

• Journal of IKEEE
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• v.23 no.2
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• pp.388-394
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• 2019

This paper describes a design of security system-on-chip (SoC) that integrates a Cortex-M0 CPU with an AAW (ARIA-AES- Whirlpool) crypto-core which implements two block cipher algorithms of ARIA and AES and a hash function Whirlpool into an unified hardware architecture. The AAW crypto-core was implemented in a small area through hardware sharing based on algorithmic characteristics of ARIA, AES and Whirlpool, and it supports key sizes of 128-bit and 256-bit. The designed security SoC was implemented on FPGA device and verified by hardware-software co-operation. The AAW crypto-core occupied 5,911 slices, and the AHB_Slave including the AAW crypto-core was implemented with 6,366 slices. The maximum clock frequency of the AHB_Slave was estimated at 36 MHz, the estimated throughputs of the ARIA-128 and the AES-128 was 83 Mbps and 78 Mbps respectively, and the throughput of the Whirlpool hash function of 512-bit block was 156 Mbps.

• Journal of Internet Computing and Services
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• v.25 no.1
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• pp.1-8
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• 2024

In the API gateway, API composition is an essential function that can reduce the number of client calls and prevent over-fetching and under-fetching. API composition that operate with IMJ (In-Memory Join) consume a lot of resources, putting a burden on the performance of the API gateway. In this paper, to improve the problem of IMJ-style API composition, we propose SAPIC (Stream-based API Composition), which delivers the data to be composed to the client by streaming. SAPIC calls each MSA API that makes up the client response data and immediately streams the received response data to the client, reducing the resource consumption of the API gateway and providing faster response time compared to IMJ. As a result of a comparison experiment with GraphQL, a representative API combination technology, SAPIC recorded a maximum CPU occupancy rate of approximately 21 to 70 % lower, a maximum heap usage rate of approximately 16 to 74 % lower, and a throughput rate that was 1 to 2.3 times higher than GraphQL.

• The Transactions of the Korea Information Processing Society
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• v.3 no.3
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• pp.617-630
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• 1996

In this paper, a shared-concurrent file system (S-CFS) is designed and implemented using conventional disks as disk arrays on a Workstation Cluster which can be used as a small-scale server. Since it is implemented on UNIX operating systems, S_CFS is not only portable and flexible but also efficient in resource usage because it does not require additional I/O nodes. The result of the research shows that on small-scale systems with enough disks, the performance of the concurrent file system on transaction processing applications is bounded by the bottleneck of CPUs computing powers while the performance of the concurrent file system on massive data I/Os is bounded by the time required to copy data between buffers. The concurrent file system,which has been implemented on a Workstation Cluster with 8 disks,shows a throughput of 388 tps in case of transaction processing applications and can provide the bandwidth of 15.8 Mbytes/sec in case of massive data processing applications. Moreover,the concurrent file system has been dsigned to enhance the throughput of applications requirring high performance I/O by controlling the paralleism of the concurrent file system on user's side.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2B
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• pp.36-43
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• 2005

This paper suggests a method to effectively apply an application model of fuzzy-neural network to the optimal load distribution algorithm, considering the complication and non-linearity of the web server environment. We use the clustering web server in the linux system and it consists of a load balancer that distributes the network loads and some of real servers that processes the load and responses to the client. The previous works considered only with the scrappy decision information such as the connections. That is, since the distribution algorithm depends on the input of the whole network throughput, it was proved inefficient in terms of performance improvement of the web server. With the proposed algorithm, it monitors the whole states of both network input and output. Then, it infers CPU and memory states of each real server and effectively distributes the requests of the clients. In this paper, the proposed model is compared with the previous method through simulations and we analysis the results to develop the optimal and intelligent load balancing model.

• The Journal of Korean Association of Computer Education
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• v.9 no.1
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• pp.107-118
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• 2006

Load redistribution algorithm is a critical factor in computer system. In a receiver-initiated load redistribution algorithm, receiver(underloaded processor) continues to send unnecessary request messages for load transfer until a sender(overloaded processor) is found while the system load is light. Therefore, it yields many problems such as low cpu utilization and system throughput because of inefficient inter-processor communications until the receiver receives an accept message from the sender in this environment. This paper presents an approach based on genetic algorithm(GA) for dynamic load redistribution including self-adjustable in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off are determined by the proposed GA to decrease unnecessary request messages.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.6
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• pp.506-512
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• 2005

Load redistribution algorithm is a critical factor in computer system. In a receiver-initiated Toad redistribution algorithm, receiver(underloaded processor) continues to send unnecessary request messages for load transfer until a sender(overloaded processor) is found while the system load is light. Therefore, it yields many problems such as low cpu utilization and system throughput because of inefficient inter-processor communications until the receiver receives an accept message from the sender in this environment. This paper presents an approach based on genetic algorithm(GA) for dynamic load redistribution including self-adjustable in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off are determined by the proposed GA to decrease unnecessary request messages.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1323-1333
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• 1997

In this paper, we propose an efficient architecture for a high-speed cell concentrator/distributor(HCCD) in an ATM(Asynchronous Transfer Mode) switch and by analyzeing the simulation results evaluate the performance of the proposed architecuture. The proposed HCCD distributes cells from a switch link to local processors, or concentrates cells from local processor s to a switch link. This design is to guarntee a high throughput for the IPC (inter-processor communication) link in a distributed ATM switching system. The HCCD is designed in a moudlar architecture to provide the extensibility and the flexibility. The main characteristics of the HCCD are 1) Adaption of a local CPU in HCCD for improving flexibility of the system, 2) A cell-baced statistical multiplexing function for efficient multiplexing, 3) A cell distribution function based on VPI(Virtual Path Identifier), 4) A bypassing capability for IPC between processor attached to the same HCCD, 5) A multicasting capability for point-to-multipoint communication, 6) A VPI table updating function for the efficient management of links, 7) A self-testing function for detecting system fault.