• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.26 no.9
• /
• pp.1405-1411
• /
• 2022

Power management is still an important issue in embedded environments as hardware advances like high-performance processors. Power management methods such as DVFS control CPU frequencies in an adaptive manner for efficient power management in polling-based I/O programs such as network communication. This paper presents the problems of the existing power management method and proposes a new power management method. Through this, it is possible to reduce electric consumption by increasing the polling cycle in situations where the frequency of data reception is low, and on the contrary, in situations where data reception is frequent, it can operate at the maximum frequency without performance degradation. After implementing this as a code layer on the embedded board and observing it through Atmel's Power Debugger, the proposed method showed a performance improvement of up to 30% in energy consumption compared to the existing power management method.

• ETRI Journal
• /
• v.10 no.3
• /
• pp.49-61
• /
• 1988

HARP(High-performance Architecture for Risc-type Processor)는 한국전자통신연구소에서 정의한 고유모델의 RISC형 32비트 CPU이다. HACAM(HArp CAche and Mmu)은 HARP의 캐쉬 메모리 및 MMU(Memory Management Unit)를 custom IC로 구현한 VLSI 칩이다. 본 논문에서는 HACAM의 구조 설계에 대해 메모리 구조 및 메모리 관리 방식, 캐쉬 메모리 및 HACAM의 구성 등으로 나누어 설명하고 그 타당성을 논하였다.

• Korean Management Science Review
• /
• v.15 no.1
• /
• pp.1-12
• /
• 1998

This paper discusses a new algorithm, the PAPANET (Pivot And Probe Algorithm for NETwork optimization), for solving linear, capacitated linear network flow problem (NPs), PAPANET is a variation and specialization of the Pivot And Probe Algorithm (PAPA) developed by Sethi and Thompson, published in 1983-1984. PAPANET first solves an initial relaxed NP (RNP) with all the nodes from the original problem and a limited set of arcs (possibly all the artificial and slack arcs). From the arcs not considered in the current relaxation, we PROBE to identify candidate arcs that violate the current solution's dual constraints maximally. Candidate arcs are added to the RNP, and this new RNP is solved to optimality. This candidate pricing procedure and pivoting continue until all the candidate arcs price unfavorably and all of the dual constraints corresponding to the other, so-called noncandidate arcs, are satisfied. The implementation of PAPANET requires significantly fewer arcs and less solution CPU time than is required by the standard network simplex method implementation upon which it is based. Computational tests on randomly generated NPs indicate that our PAPANET implementation requires up to 40-50% fewer pivots and 30-40% less solution CPU time than is required by the comparable standard network simplex implementation from which it is derived.

• Journal of Korea Multimedia Society
• /
• v.12 no.2
• /
• pp.178-190
• /
• 2009

XML is recommended by W3C(World Wide Web) and widely accepted as a standard markup language for expression and sharing data. Recently, increasing the use and the amount of XML documents, there is required that easy methods for accessing XML documents at anytime and anywhere, therefore, the distributed XML repository systems is developed. For this, distributed XML repository systems is necessary to research catalog management schemes. In this paper, we design distributed XML database model considering CPU costs, I/O costs, concurrency control, two-phase commits a protocol, queuing delay and so on. And we implement a simulator in order to execute performance evaluation centralized catalog method, fully replicated catalog method, and partitioned catalog method using reasonably setting up environments.

• The KIPS Transactions:PartA
• /
• v.9A no.4
• /
• pp.405-412
• /
• 2002

The embedded system has less fast CPU and lower memory than PC(personal Computer) or Workstation system. Therefore embedded operating is system is designed to efficiently use the limited resource in the system. Virtual memory management or the embedded linux have a low efficiency when page fault is occurred to get a data from I/O device. Because a data is moving from the swap device to main memory. This paper suggests virtual memory compression algorithm for improving in virtual memory management and capacity of space. In this paper, we present a way to performance implement a virtual memory compression system that achieves significant improvement for the embedded system.

• Aerospace Engineering and Technology
• /
• v.4 no.2
• /
• pp.79-87
• /
• 2005

This paper describes a new on-board computer design for the next generation satellite. The new on-board computer utilizes centralized processing architecture with MCMERC325C CPU based on functional modular design concepts. The on-board computer consists of PM32 Module, TC-TM Module, IO Module and Power module. The IEEE-1355 DS/DE, or SpaceWire, provides a standard communication interface between module. It also provides simple cross-strap design for redundancy management and increases re-usability of the modules.

• Proceedings of the Korean Information Science Society Conference
• /
• 2012.06a
• /
• pp.173-175
• /
• 2012

데이터 센터와 같은 대량의 서버를 사용하는 시설이 늘어남에 따라 전력 소모 관리와 열 발생 관리는 매우 중요한 문제가 되었다. 열 관리 연구들의 경우 대부분 열관리의 목적이 시스템의 오류를 방지하는 것이다. 하지만 열 관리에는 많은 전력 소모량이 사용된다. 따라서 열관리를 잘 해주는 것은 전력 관리를 효율적으로 해주는 것이라고 할 수도 있다. 본 논문은 열 관리를 전력 관리라는 측면에서 접근했다. 즉 열 관리에 사용되는 전력과 열로 인해 발생하는 전력을 고려해서 이를 최소화하는 냉각 제어 기법을 구현하였다. 우리가 개발한 냉각 제어 기법을 실제로 실험해서 기존의 냉각 기법과 비교해본 결과 전력 소모량을 17% 감소시키는 것을 확인 할 수 있었다.

• Proceedings of the SAREK Conference
• /
• 2008.11a
• /
• pp.601-604
• /
• 2008

Desktop PC CPUs have been significantly required to be the necessity of thermal management while they have satisfied the extensive data and graphic processing requirements. So the cooling systems assembled with heat pipes embedded in a metal cooling plate, and fins are widely used in the desktop PC markets. Due to a number of demands such as the confined space of desktop PCs, higher heat density of CPUs, and acoustic noise, however, there is the main drive to improve continuously cooling systems. This paper presents the flow and thermal behavior of the cooling system by using the computational fluid dynamics(CFD) code.

• Journal of the Korea Society of Computer and Information
• /
• v.8 no.3
• /
• pp.40-46
• /
• 2003

The high-performance processors have recently employed sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. For the query processing of database management systems, those hardware characteristics are the important research issue. The latest works show that the cache miss penalty between main memory and CPU becomes new bottlenecks and the branch misprediction causes serious resource-waste. An effcient algorithm for query processing of aggregate functions considering these hardware characteristics was proposed in this dissertation.

• Journal of the Korea Society of Computer and Information
• /
• v.21 no.1
• /
• pp.125-129
• /
• 2016

In this paper, we propose an efficient dynamic workload balancing strategy which improves the performance of high-performance computing system. The key idea of this dynamic workload balancing strategy is to minimize execution time of each job and to maximize the system throughput by effectively using system resource such as CPU, memory. Also, this strategy dynamically allocates job by considering demanded memory size of executing job and workload status of each node. If an overload node occurs due to allocated job, the proposed scheme migrates job, executing in overload nodes, to another free nodes and reduces the waiting time and execution time of job by balancing workload of each node. Through simulation, we show that the proposed dynamic workload balancing strategy based on CPU, memory improves the performance of high-performance computing system compared to previous strategies.