• Title/Summary/Keyword: CMP Slurry

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Optimization of Groove Sizing in CMP using CFD (CFD를 이용한 CMP의 Groove Sizing 최적화)

  • Jang, Ji-Hwan;Lee, Do-Hyung
    • Proceedings of the KSME Conference
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    • 2004.11a
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    • pp.1522-1527
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    • 2004
  • In this paper, slurry fluid motion, abrasive particle motion, and effects of groove sizing on the pads are numerically investigated in the 2D geometry. Groove depth is optimized in order to maximized the abrasive effect. The simulation results are analyzed in terms of shear stress on pad, groove and wafer, streamline and velocity vector. The change of groove depth entails vortex pattern change, and consequently affects material removal rate. Numerical analysis is very helpful for disclosing polishing mechanism and local physics.

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CMP Process Monitoring through Friction Force Measurement (마찰력 측정을 통한 CMP 공정의 모니터링)

  • 정해도;박범영;이현섭;김형재;서헌덕
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.10a
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    • pp.622-625
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    • 2004
  • The CMP monitoring system was newly developed by the aid of friction force measurement, resulting from installation of piezoelectric quartz sensor on R&D polisher. The correlation between friction and CMP results was investigated in terms of tribological aspects by using the monitoring system. Various friction signals were monitored and analyzed by the change of experimental conditions such as pressure, velocity, pad and slurry. First of all, the lubrication regimes were classified with Sommerfeld Number through measuring coefficient of friction in ILD CMP. And then, the removal mechanism of abrasives could be understood through the correlation with removal rate and coefficient of friction. Especially, the amount of material removal per unit sliding distance is directly proportional to the friction force. The uniformity of CMP performances was also deteriorated as coefficient of friction increased.

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Oxide Planarization of Trench Structure using Chemical Mechanical Polishing(CMP) (기계화학적 연마를 이용한 트렌치 구조의 산화막 평탄화)

  • 김철복;김상용;서용진
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.10
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    • pp.838-843
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    • 2002
  • Chemical mechanical polishing(CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for deep sub-micron technology. The reverse moat etch process has been used for the shallow trench isolation(STI)-chemical mechanical polishing(CMP) process with conventional low selectivity slurries. Thus, the process became more complex, and the defects were seriously increased. In this paper, we studied the direct STI-CMP process without reverse moat etch step using high selectivity slurry(HSS). As our experimental results show, it was possible to achieve a global planarization without the complicated reverse moat process, the STI-CMP process could be dramatically simplified, and the defect level was reduced. Therefore the throughput, yield, and stability in the ULSI semiconductor device fabrication could be greatly improved.

A Study on the Polishing Characteristics Using Floating Nozzle in Linear Roll CMP (선형 롤 CMP에서 플로팅 노즐을 이용한 연마 특성에 관한 연구)

  • Lee, Chiho;Jeong, Haedo
    • Journal of the Korean Society for Precision Engineering
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    • v.32 no.7
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    • pp.627-631
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    • 2015
  • Conventional etching technology is in the face of problems such as dishing, erosion resulting from non-uniform removal of film. Advanced printed circuit board (PCB) requires accurate wire formation with the aid of planarization by chemical mechanical polishing (CMP). Linear roll CMP is a line contact continuous process which removes the film by pressurization and rotation while slurry is supplied to polishing pad attached to the roll. This paper focuses on the design of floating nozzle on the linear roll CMP equipment which makes the slurry supply uniformly on the roll pad. Experimental results show that removal rate using the floating nozzle increases 3 times higher than that without it and non-uniformity is less than 15%.

Effects of W CMP Process on PAD Characterization (패드 특성이 W CMP 공정에 미치는 영향)

  • Kim, Sang-Yong;Seo, Yong-Jin;Chung, Hun-Sang;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.178-181
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    • 2002
  • We studied the characteristics of polishing pad, which can apply W CMP process for global planarization of multilevel interconnection structure. Also we investigated the effects of different sets of polishing pad. The purpose of this experiment is the cost reduction by the increase of pad life time and decrease of cycle time and slurry usage with new pad. Especially we studied the effect of polishing pad for CMP process by this experiment of polishing pad that is consumables material during CMP process. We expecting the increase of process throughput and improvement of device manufacturing yield because we can choose optimum polishing pad through this result.

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A Study for Global Planarization of Mutilevel Metal by CMP (Chemical Mechanical Polishing (CMP) 공정을 이용한 Mutilevel Metal 구조의 광역 평탄화에 관한 연구)

  • 김상용;서용진;김태형;이우선;김창일;장의구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.12
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    • pp.1084-1090
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    • 1998
  • As device sizes are scaled down to submicron dimensions, planarization technology becomes increasingly important for both device fabrication and formation of multilevel interconnects. Chemical mechanical polishing (CMP) has emerged recently as a new processing technique for achieving a high degree of planarization for submicron VLSI applications. The polishing process has many variables, and most of which are not well understood. The factors determine the planarization performance are slurry and pad type, insert material, conditioning technique, and choice of polishing tool. Circuit density, pattern size, and wiring layout also affect the performance of a CMP planarization process. This paper presents the results of studies on CMP process window characterization for 0.35 micron process with 5 metal layers.

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Tungsten CMP in Fixed Abrasive Pad using Hydrophilic Polymer (친수성 고분자를 이용한 고정입자패드의 텅스텐 CMP)

  • 박범영;김호윤;김형재;김구연;정해도
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.7
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    • pp.22-29
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    • 2004
  • As a result of high integration of semiconductor device, the global planarization of multi-layer structures is necessary. So the chemical mechanical polishing(CMP) is widely applied to manufacturing the dielectric layer and metal line in the semiconductor device. CMP process is under influence of polisher, pad, slurry, and process itself, etc. In comparison with the general CMP which uses the slurry including abrasives, fixed abrasive pad takes advantage of planarity, resulting from decreasing pattern selectivity and defects such as dishing & erosion due to the reduction of abrasive concentration especially. This paper introduces the manufacturing technique of fixed abrasive pad using hydrophilic polymers with swelling characteristic in water and explains the self-conditioning phenomenon. And the tungsten CMP using fixed abrasive pad achieved the good conclusion in terms of the removal rate, non-uniformity, surface roughness, material selectivity, micro-scratch free contemporary with the pad life-time.

Effect of Surfactant on the Dispersion Stability of Slurry for Semiconductor Silicon CMP (계면활성제가 반도체 실리콘 CMP용 슬러리의 분산안정성에 미치는 영향)

  • Yun, Hye Won;Kim, Doyeon;Han, Do Hyung;Kim, Dong Wan;Kim, Woo-Byoung
    • Journal of Powder Materials
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    • v.25 no.5
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    • pp.395-401
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    • 2018
  • The improvement of dispersion stability for the primary polishing slurry in a CMP process is achieved to prevent defects produced by agglomeration of the slurry. The dispersion properties are analyzed according to the physical characteristics of each silica sol sample. Further, the difference in the dispersion stability is confirmed as the surfactant content. The dispersibility results measured by Zeta potential suggest that the dispersion properties depend on the content and size of the abrasive in the primary polishing slurry. Moreover, the optimum ratio for high dispersion stability is confirmed as the addition content of the surfactant. Based on the aforementioned results, the long-term stability of each slurry is analyzed. Turbiscan analysis demonstrates that the agglomeration occurs depending on the increasing amount of surfactant. As a result, we demonstrate that the increased particle size and the decreased content of silica improve the dispersion stability and long-term stability.

Fabrication of Silica Nanoparticles by Recycling EMC Waste from Semiconductor Molding Process and Its Application to CMP Slurry (반도체 몰딩 공정에서 발생하는 EMC 폐기물의 재활용을 통한 실리카 나노입자의 제조 및 반도체용 CMP 슬러리로의 응용)

  • Ha-Yeong Kim;Yeon-Ryong Chu;Gyu-Sik Park;Jisu Lim;Chang-Min Yoon
    • Journal of the Korea Organic Resources Recycling Association
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    • v.32 no.1
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    • pp.21-29
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    • 2024
  • In this study, EMC(Epoxy molding compound) waste from the semiconductor molding process is recycled and synthesized into silica nanoparticles, which are then applied as abrasive materials contains CMP(Chemical mechanical polishing) slurry. Specifically, silanol precursor is extracted from EMC waste according to the ultra-sonication method, which provides heat and energy, using ammonia solution as an etchant. By employing as-extracted silanol via a facile sol-gel process, uniform silica nanoparticles(e-SiO2, experimentally synthesized SiO2) with a size of ca. 100nm are successfully synthesized. Through physical and chemical analysis, it was confirmed that e-SiO2 has similar properties compared to commercially available SiO2(c-SiO2, commercially SiO2). For practical CMP applications, CMP slurry is prepared using e-SiO2 as an abrasive and tested by polishing a semiconductor chip. As a result, the scratches that are roughly on the surface of the chip are successfully removed and turned into a smooth surface. Hence, the results present a recycling method of EMC waste into silica nanoparticles and the application to high-quality CMP slurry for the polishing process in semiconductor packaging.