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http://dx.doi.org/10.4313/JKEM.2002.15.10.838

Oxide Planarization of Trench Structure using Chemical Mechanical Polishing(CMP)  

김철복 (동성 A&T부설연구소)
김상용 (아남반도체 FAB사업부)
서용진 (대불대학교 전기공학과)
Publication Information
Journal of the Korean Institute of Electrical and Electronic Material Engineers / v.15, no.10, 2002 , pp. 838-843 More about this Journal
Abstract
Chemical mechanical polishing(CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for deep sub-micron technology. The reverse moat etch process has been used for the shallow trench isolation(STI)-chemical mechanical polishing(CMP) process with conventional low selectivity slurries. Thus, the process became more complex, and the defects were seriously increased. In this paper, we studied the direct STI-CMP process without reverse moat etch step using high selectivity slurry(HSS). As our experimental results show, it was possible to achieve a global planarization without the complicated reverse moat process, the STI-CMP process could be dramatically simplified, and the defect level was reduced. Therefore the throughput, yield, and stability in the ULSI semiconductor device fabrication could be greatly improved.
Keywords
STI(shallow trench Isolation); CMP(chemical mechanical polishing); HSS(high selectivity slurry; LOCOS(local oxidation of silicon);
Citations & Related Records
Times Cited By KSCI : 5  (Citation Analysis)
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