• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.2
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• pp.378-384
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• 2013

In this paper, a CMOS temperature sensor is proposed to measure the internal temperature of a chip. The temperature sensor consists of a proportional-to-absolute-temperature (PTAT) circuit for a temperature sensing part and a 4-bit analog-to-digital converter (ADC) for a digital interface. The PTAT circuit with the compact area is designed by using a vertical PNP architecture in the CMOS process. To reduce sensitivity of temperature variation in the digital interface circuit of the proposed temperature sensor, a 4-bit successive approximation (SA) ADC using the minimum analog circuits is used. It uses a capacitor-based digital-to-analog converter and a time-domain comparator to minimize power consumption. The proposed temperature sensor was fabricated by using a $0.25{\mu}m$ 1-poly 6-metal CMOS process with a 2.5V supply, and its operating temperature range is from 50 to $150^{\circ}C$. The area and power consumption of the fabricated temperature sensor are $130{\times}390{\mu}m^2$ and $868{\mu}W$, respectively.

• Journal of Sensor Science and Technology
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• v.5 no.6
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• pp.25-34
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• 1996

In this paper, we have designed signal conditioning circuitry for piezoresistive pressure sensor. Signal conditioning circuitry consists of voltage reference circuit for sensor driving voltage and instrument amplifier for sensor signal amplification. Signal conditioning circuitry is simulated using HSPICE in a single poly double metal $1.5\;{\mu}m$ BiCMOS technology. Simulation results of band-gap reference circuit showed that temperature coefficient of $21\;ppm/^{\circ}C$ at the temperature range of $0\;{\sim}\;70^{\circ}C$ and PSRR of 80 dB. Simulation results of BiCMOS amplifier showed that dc voltage gain, offset voltage, CMRR, CMR and PSRR are outperformed to CMOS and Bipolar, but power dissipation and noise voltage were more improved in CMOS than BiCMOS and Bipolar. Designed signal conditioning circuitry showed high input impedance, low offset and good CMRR, therefore, it is possible to apply sensor and instrument signal conditioning circuitry.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2001.12a
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• pp.15-18
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• 2001

Recently, CMOS image sensor is rapidly used as an image capture device such as mobile phone or notebook PC. Because of poor quality of image by CMOS image sensor, ISP is essential step to improve image quality. In this paper, we implemented and simulated ISP algorithm for real time moving picture of CMOS image sensor. Especial Iy, we concentrated on color interpolation, which extracts three color component from uncompleted color information. Several algorithms for color interpolation are implemented and analyzed to acquire a good quality of picture. Finally, we proposed an improved algorithm and confirmed the effectiveness by experimental simulation results.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.35 no.5
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• pp.460-465
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• 2007

This paper deals with the Fine Digital Sun Sensor (FDSS) for Science & Technology Satellite 2(STSAT-2). The FDSS was firstly developed by using CMOS-Image sensor(CIS) in South Korea. This paper will describe the configuration of the FDSS, the design of the optical part, the analysis result of the optical characteristics of the sunlight, and the calibration result measured by solar simulator.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.1
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• pp.17-21
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• 2019

In this paper, a high precision straightness measurement system has been developed at low cost using a visible laser and CMOS image sensor. CMOS image sensor detected optical image and the variation of straightness was calculated by image processing. We have observed that the error of the developed straightness measurement system was 0.9% when a distance of 3m between laser and image sensor. And it can be applied to 3D printer and any other areas.

• Journal of Sensor Science and Technology
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• v.18 no.1
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• pp.95-101
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• 2009

A simple and new CMOS potentiostat circuit for amperometric sensor is described. To maintain a constant potential between the reference and working electrodes, only one differential difference amplifier (DDA) is needed in proposed design, while conventional potentiosatat requires at least 2 operational amplifiers and 2 resistors, or more than 3 operational amplifiers and 4 resistors for low voltage CMOS integrated potentiostat. The DDA with rail-to-rail design not only enables the full range operation to supply voltage but also provides simple potentiostat system with small hardwares and low power consumption.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.8
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• pp.330-334
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• 2003

A Temperature sensor system in which the digital output signal is proportional to the operating temperature is designed. The temperature sensor system is designed by using BiCMOS technology and consists of temperature sensor, voltage-to-frequency converter and counter. The proposed temperature sensor system has error less than $1^{\circ}C$ in the temperature range $-25^{\circ}C$ to $55^{\circ}C$.

• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.332-336
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• 2014

In this paper, we propose a complementary metal oxide semiconductor (CMOS) binary image sensor with a gate/body-tied (GBT) PMOSFET-type photodetector for high-speed operation. The GBT photodetector of an active pixel sensor (APS) consists of a floating gate ($n^+$-polysilicon) tied to the body (n-well) of the PMOSFET. The p-n junction photodiode that is used in a conventional APS has a good dynamic range but low photosensitivity. On the other hand, a high-gain GBT photodetector has a high level of photosensitivity but a narrow dynamic range. In addition, the pixel size of the GBT photodetector APS is less than that of the conventional photodiode APS because of its use of a PMOSFET-type photodetector, enabling increased image resolution. A CMOS binary image sensor can be designed with simple circuits, as a complex analog to digital converter (ADC) is not required for binary processing. Because of this feature, the binary image sensor has low power consumption and high speed, with the ability to switch back and forth between a binary mode and an analog mode. The proposed CMOS binary image sensor was simulated and designed using a standard CMOS $0.18{\mu}m$ process.

• The KIPS Transactions:PartB
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• v.15B no.3
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• pp.189-196
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• 2008

In this paper, a CMOS digital image sensor, which consists of A/D conversion, motion estimation circuits, and an attention module for ROI (Region of Interest) detection is presented. The functions of A/D conversion and motion estimation are implemented by $0.6{\mu}m$ CMOS processing circuit as hardware, and the attention module is implemented outside the circuit as software currently. Attention modules are taken to improve limited applications of the smart image sensor. The current smart image sensor responses to the changes of intensity, and uses the integration time to estimate motion. Therefore it is limited in its applications. To make up for inherent property of the sensor from circuit design and extend its applications we decide to introduce perception solutions to the image sensor. Attention modules for still and moving images are employed to achieve such purposes. The suggested approach makes the smart image sensor available with additional functions for such cases that motion estimation or intensity changes are not observed. Experimental result shows the usefulness and extension of the image sensor.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.2
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• pp.146-153
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• 2008

Integrated humidity sensor system with two stages operational amplifier has been designed and fabricated by $0.8{\mu}m$ analog mixed CMOS technology. The system (28 pin and $2mm{\times}4mm$) consisted of Wheatstone-bridge type humidity sensor, resistive type humidity sensor, temperature sensors and operational amplifier for signal amplification and process in one chip. The poly-nitride etch stop process has been tried to form the sensing area as well as trench in a standard CMOS process. This modified technique did not affect the CMOS devices in their essential characteristics and gave an allowance to fabricate the system on same chip by standard process. The operational amplifier showed the stable operation so that unity gain bandwidth was more than 5.46 MHz and slew rate was more than 10 V/uS, respectively. The drain current of n-channel humidity sensitive field effect transistor (HUSFET) increased from 0.54 mA to 0.68 mA as the relative humidity increased from 10 to 70 %RH.