• 제목/요약/키워드: CBPWM

검색결과 6건 처리시간 0.017초

A Hybrid CBPWM Scheme for Single-Phase Three-Level Converters

  • Wang, Shunliang;Song, Wensheng;Feng, Xiaoyun;Ding, Rongjun
    • Journal of Power Electronics
    • /
    • 제16권2호
    • /
    • pp.480-489
    • /
    • 2016
  • A novel hybrid carrier-based pulse width modulation (CBPWM) scheme that combines unipolar and dipolar modulations is proposed for single-phase three-level rectifiers, which are widely applied in railway traction drive systems. The proposed CBPWM method can satisfy the volt-second balancing principle in the complete modulation index region through overmodulation compensation. The modulation scheme features two modulation modes: unipolar and dipolar. The operation range limits of these modulation modes can be modified by changing the separation coefficient. In comparison with the traditional unipolar CBPWM, the proposed hybrid CBPWM scheme can provide advantageous features, such as lower high-order harmonic distortion of the line current and better utilization of switching frequency. The separation coefficient value is optimized to achieve the maximum utilization of these advantages. The experimental results verify the feasibility and effectiveness of the proposed hybrid CBPWM scheme.

A Hybrid Modulation Strategy with Reduced Switching Losses and Neutral Point Potential Balance for Three-Level NPC Inverter

  • Jiang, Weidong;Gao, Yan;Wang, Jinping;Wang, Lei
    • Journal of Electrical Engineering and Technology
    • /
    • 제12권2호
    • /
    • pp.738-750
    • /
    • 2017
  • In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

Novel Carrier-Based PWM Strategy of a Three-Level NPC Voltage Source Converter without Low-Frequency Voltage Oscillation in the Neutral Point

  • Li, Ning;Wang, Yue;Lei, Wanjun;Niu, Ruigen;Wang, Zhao'an
    • Journal of Power Electronics
    • /
    • 제14권3호
    • /
    • pp.531-540
    • /
    • 2014
  • A novel carrier-based PWM (CBPWM) strategy of a three-level NPC converter is proposed in this paper. The novel strategy can eliminate the low-frequency neutral point (NP) voltage oscillation under the entire modulation index and full power factor. The basic principle of the novel strategy is introduced. The internal modulation wave relationship between the novel CBPWM strategy and traditional SPWM strategy is also studied. All 64 modulation wave solutions of the CBPWM strategy are derived. Furthermore, the proposed CBPWM strategy is compared with traditional SPWM strategy regarding the output phase voltage THD characteristics, DC voltage utilization ratio, and device switching losses. Comparison results show that the proposed strategy does not cause NP voltage oscillation. As a result, no low-frequency harmonics occur on output line-to-line voltage and phase current. The novel strategy also has higher DC voltage utilization ratio (15.47% higher than that of SPWM strategy), whereas it causes larger device switching losses (4/3 times of SPWM strategy). The effectiveness of the proposed modulation strategy is verified by simulation and experiment results.

부트스트랩 회로를 적용한 3-레벨 NPC 인버터의 저속 운전을 위한 PWM 스위칭 전략 (A PWM strategy for low speed operation of three-level NPC inverter based on bootstrap gate drive circuit)

  • 정준형;임원상;구현근;김장목
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2013년도 전력전자학술대회 논문집
    • /
    • pp.112-113
    • /
    • 2013
  • 본 논문에서는 부트스트랩 게이트 드라이브 회로가 적용된 3-레벨 NPC 인버터의 전동기 저속 운전에 적용하기 위한 PWM 스위칭 전략을 제안한다. 3-레벨 NPC 인버터를 이용하여 전동기를 제어할 경우, 일반적으로 구현의 편리성 때문에 CBPWM이 주로 사용된다. CBPWM 중 Unipolar 방법이 주로 사용되지만 부트스트랩 회로를 적용한 3-레벨 NPC 인버터의 전동기 저속 운전 시 부트스트랩 캐패시터 방전에 의한 전압 감소 크기가 증가한다. 캐패시터 전압이 정상적인 인버터 동작을 위한 한계 전압 이하로 감소하면 정상적인 제어는 불가능하다. 따라서 본 논문에서는 부트스트랩 회로가 적용된 3-레벨 NPC 인버터의 전동기 저속 운전에 적용하기 위한 PWM 스위칭 전략에 대해 제안 하였으며 시뮬레이션을 통하여 그 타당성을 증명하였다.

  • PDF

3레벨 ANPC 인버터의 안정적인 고장 허용 운전을 위한 중성점 전압 균형 제어 기법 (Netral-Point Voltage Balancing Control Scheme for Stable Fault-Tolerant Operation of 3-Level ANPC Inverter)

  • 이재운;박병건;김지원;노의철
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2018년도 추계학술대회
    • /
    • pp.215-216
    • /
    • 2018
  • 본 논문에서는 Carrier-Based Pulse Width Modulation(CBPWM)을 사용한 Active Neutral Point Clamped (ANPC) 인버터의 안정적인 고장 허용 운전을 위한 중성점 전압 균형 제어 기법을 제안한다. 제안된 기법은 ANPC 인버터를 구성하고 있는 전력 반도체 스위치의 고장으로 인한 고장 허용 운전 시, 출력 특성이 저하되는 문제점을 해결하기 위해 스위칭 조합의 재구성과 기준 출력전압의 변조를 통한 중성점 전압 균형을 유지한다. 제안된 기법의 타당성은 RT-BOX를 통한 HIL 시뮬레이터를 이용하여 확인하였다.

  • PDF

Pulse-Width Modulation Strategy for Common Mode Voltage Elimination with Reduced Common Mode Voltage Spikes in Multilevel Inverters with Extension to Over-Modulation Mode

  • Pham, Khoa-Dang;Nguyen, Nho-Van
    • Journal of Power Electronics
    • /
    • 제19권3호
    • /
    • pp.727-743
    • /
    • 2019
  • This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.