• Journal of Power Electronics
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• v.9 no.3
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• pp.447-455
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• 2009

The power supply systems, which require low-voltage / high-current output has been changing from the conventional centralized power system to a distributed power system. The distributed power system consists of a bus converter and POL. The most important factor is the system stability in bus architecture design. The overlap between the output impedance of a bus converter input impedance of POL causes system instability and has been an actual problem. By increasing the bus capacitor, the system stability can be easily improved. However, due to limited space on the system board, the increasing of bus capacitors is impractical. An urgent solution of this issue is strongly desired. This paper presents the output impedance design for on-board distributed power system by means of three control schemes of a bus converter. The output impedance peak of the bus converter and the input impedance of the POL are analyzed and then conformed experimentally for stability criterion. Furthermore, the design process of each control schemes for system stability is proposed.

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.169-174
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• 2003

The thermal design of the bus bar of a Gas-Insulated Switchgear(GIS) becomes important since the current-carrying capacity of the GIS is limited by maximum operating temperature. In order to predict temperature rise of the bus bar, a program has been developed. Various heat sources possibly generated in the bus bar are calculated in the program. To estimate temperature rises at the bus bar caused by the heat balance between the heat generation and heat transfer, the finite volume method as well as the $4^{th}$ order Runge-Kutta method has been employed. In the experiments, temperature rises at conductor, contact part and external tank are measured for full-scale gas-insulated bus bars. The comparisons of the predicted values of the heat balance calculation to those of the experiments are made. From the comparisons, it is concluded that the developed program can predict the temperature rise of the bus bar quite well.

• Journal of Korean Society for Geospatial Information Science
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• v.3 no.2 s.6
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• pp.199-211
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• 1995

Bus, Which is together with subway the main part of public transportation modes in the city, is reviewed for the development of an optimal feeder-bus service area. Based on the IDRISI of GIS package, and taking into account of the convenience of downtown-oriented public transportation users at peak time, a model for the development of feeder-bus service area and a solution and introduced. Major result in this study is as follows: Development is given to a model that is designed to overcome the shortage of the existing models, which has limits in simulating the real situation; Variables were used in combination so that bus and subway route, station spacing, and operating frequency can be determined simultaneously, which enables to elucidate the mutual relationship and the structure in public transportation system. A model for feeder-bus area development is also given applied to determination and opening of subway and urban express bus route and new transportation systems. The model developed in this paper is useful in the case of extension and opening of subway and urban express bus route and new transportation Systems.

• Proceedings of the KIEE Conference
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• 1998.07a
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• pp.302-304
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• 1998

Self magnetic field in a Bus bar usually degrades the critical current in it. Actually the total critical current of a Bus bar is not the same as the sum of total critical current of each stacked HTS tape. This is due to the self field effects in a bus bar. To reduce the degradations of critical current in a bus bar, we need to analyze the self field distributions in a bus bar. Conceptually, by rearranging the each stacked tapes, the self field effects can be minimized. In this paper, we calculate the self magnetic field distributions across a bus bar analytically, with the variations of the relative angle of the two conductors in a go-and-return pair. As a result, we suggest that the optimum relative angle exist which minimize the self field effect in a bus bar.

• International Journal of Highway Engineering
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• v.15 no.6
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• pp.135-141
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• 2013

PURPOSES : The lack of details of design guideline for zig-zag shaped section approaching central bus stop leads an traffic accident proneness. So, this study analysed the geometric elements of central bus stop area in terms of vehicle dynamics and suggested design alternatives. METHODS : The study analysed a dynamic behaviour of bus moving in and out of zig-zag shaped section using Auto-Turn under scenarios. Based upon dynamic analysis, the study found out the width of overtaking lane is the most influential factor for a safe moving at zig-zag alignment. RESULTS : The width of overtaking lane at design speed of 40, 50, and 60 km/h respectively was suggested given taper ratio of 1 to 10 required for Bus Rapid Transit (BRT), and the lane width is not wider than 4.0m which possibly makes two vehicles using the same lane. Also, the width of overtaking lane which mitigates the taper ratio was suggested with the same restriction about the maximum lane width. CONCLUSIONS : The results of the study can be used to prepare a design guideline on zig-zag shaped alignment of central bus exclusive lanes. The more stable moving is expected by applying the design alternatives suggested, therefore the lower rate of traffic crashes at the vicinity of central bus stops.

• Journal of electromagnetic engineering and science
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• v.5 no.4
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• pp.193-196
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• 2005

The DC power-bus for the PCB is loaded with metal walls on its selected sides and is characterized electromagnetically. This is a novel concept of approach to mitigate the spurious resonance and finally signal integrity problems. In particular, the peak at DC, which is always in the way to secure parallel-plates' EMC, can be completely removed by the proposed method. Through the findings of this study, the effect of metal-loading of the power-bus will be presented along with the impression that the suggested technique can tackle the headaches of signal integrity, ground bounce, EMIs.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.4
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• pp.742-747
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• 2009

Many works on the temperature distribution of power apparatus have usually done by coupled magneto-thermal analysis. Such a method can not consider the internal gas or oil flow in the power apparatus such as gas insulated switchgear, GIS bus bar, and power transformer. Moreover it can not show the internal temperature distribution of the power apparatus exactly. This paper proposes a coupled magneto-thermal-flow analysis considering Navier-Stokes equations. The convection heat transfer coefficient is calculated analytically by applying Nusselt number for natural convection and is applied to the boundary condition of proposed method. Temperature distribution of the GIS bus bar model considering thermal flow is obtained by the proposed method and shows good agreement with the experimental data.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.4
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• pp.263-270
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• 2021

Active AC/DC converters with PWM operation are utilized to regulate rectified DC bus voltage of a permanent magnet synchronous generator in the maritime DC power system. A DC bus voltage regulation strategy that exploits the six-step operation is proposed in this study. Compared with that of the PWM operation, switching loss of the converter can be significantly reduced under the six-step operation. Moreover, conduction loss can also be reduced due to the high modulation index and reduced flux-weakening current of the six-step operation. A controller is used for the proposed DC bus voltage regulation strategy to verify its validity with the simulation and experimental setup. The simulation and the experimental test results showed that the converter loss reduces to a maximum of 70% and 19%, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.24-31
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• 2007

Up to date, a lot of bus protocol and bus architecture are released though most of them are based on the shared bus architecture and inherit the limitation of performance. SNP (SoC Network Protocol), and hence, SNA (SoC Network Architecture) which are high performance on-chip-bus protocol and architecture, respectively, have been proposed to solve the problems of the conventional shared bus. We refine the SNA specification and improve the performance and functionality. The performance of the SNA is improved by supporting simultaneous routing for bus request of multiple masters. The internal routing logic is also improved so that the gate count is decreased. The proposed SNA employs XSNP (extended SNP) that supports almost perfect compatibility with AMBA AHB protocol without performance degradation. The hardware complexity of the improved SNA is not increased much by optimizing the current routing logic. The improved SNA works for IPs with the original SNP at its best performance. In addition, it can also replace the AMBA AHB or interconnect matrix of a system, and it guarantees simultaneous multiple channels. That is, the existing AMBA system can show much improved performance by replacing the AHB or the interconnect matrix with the SNA. Thanks to the small number of interconnection wires, the SNA can be used for the off-chip bus system, too. We verify the performance and function of the proposed SNA and XSNP simulation and emulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.4 s.334
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• pp.9-18
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• 2005

This paper proposes the novel synchronous segmented bus architecture that has the pipeline bus architecture based on OCP(open core protocol) and the memory-oriented bus for MPEG system. The proposed architecture has bus architectures that support the memory interface for image data processing of MPEG system. Also it has the segmented hi-directional multiple bus architecture for multitasking processing by using multi -masters/multi - slave. In the scheme address of masters and slaves are fixed so that they are arranged for the location of IP cores according to operational characteristics of the system for efficient data processing. Also the bus architecture adopts synchronous segmented bus architecture for reuse of IP's and architecture or developed chips. This feature is suitable to the high performance and low power multimedia SoC systum by inherent characteristics of multitasking operation and segmented bus. Proposed bus architecture can have up to 3.7 times improvement in the effective bandwidth md up to 4 times reduction in the communication latency.