• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2001년도 춘계학술대회 논문집
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• pp.946-949
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• 2001

Mirror surface finish of Si-wafers has been achieved by rotary in-feed machining with cup-type wheels in ELID grinding. But the diameter of the workpiece is limited with the diameter of the grinding wheel in the in-feed machining method. In this study, some grinding experiments by the rotary surface grinding machine with straight type wheels were conducted, by which the possible grinding area of the workpiece is independent of the diameter of the wheels. For the purpose of investigating the grinding characteristics of large scale diametral silicon wafer, grinding conditions such as rotation speed of grinding wheels and revolution of workpiece are varied, and grinding machine used in this experiment is rotary type surface grinding m/c equipped with an ELID unit. The surface ground using the SD8000 wheels showed that mirror like surface roughness can be attained near 2~6nm in Ra.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.533-536
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• 2001

Single crystal cubic silicon carbide(3C-SiC) thin film were deposited on Si(100) substrate up to a thickness of 4.3 $\mu\textrm{m}$ by APCVD(atmospheric pressure chemical vapor deposition) method using hexamethyildisilane(HMDS) at 1350$^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like. The growth rate of the 3C-SiC films was 4.3 $\mu\textrm{m}$/hr. The 3C-SiC epitaxical layers on Si(100) were characterized by XRD(X-ray diffraction), raman scattering and RHEED(reflection high-energy electron diffraction), respectively The 3C-SiC distinct phonons of TO(transverse optical) near 796 cm$\^$-1/ and LO(longitudinal optical) near 974${\pm}$1 cm$\^$-1/ were recorded by raman scattering measurement. The deposition films were identified as the single crystal 3C-SiC phase by XRD spectra(2$\theta$=41.5$^{\circ}$). Also, with increase of films thickness, RHEED patterns gradually changed from a spot pattern to a streak pattern

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.747-750
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• 2000

In this work, we investigated the dependence of optical and electrical properties of amorphous hydrogenated SiC (a-SiC:H) films on annealing temperature(T$\sub$a/). The a-SiC:H films were deposited by PECVD(plasma enhanced vapor deposition) on coming glass, p-type Si(100) wafer using SiH$_4$+CH$_4$+N$_2$gas mixture. The experimental results have shown that the optical energy band gap(E$\sub$g/) of the a-SiC thin films unchanged in the range of T$\sub$a/ from 400$^{\circ}C$ to 600$^{\circ}C$. The Raman spectrum of the thin films, annealed at high temperatures, has shown that graphitization of carbon clusters and micro-crystalline silicon occurs. The current-voltage characteristics have shown good electrical properties at the annealed films.

• 한국결정성장학회지
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• 제6권2호
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• pp.185-193
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• 1996

(100) Si wafer를 $2.5^{\circ},\;5^{\circ}$ 기울인 뒤, dry $O_{2}$ 분위기에서 산화시킴으로써, 시편들 간의 산화 거동 및 산화에 의한 적층 결함 특성의 차이를 알아보았다. 시편을 $900~1200^{\circ}C$에서 산화시키고 ellipsometer로 두께를 측정한 결과 저탈각 (100) Si이 (100) Si보다 산화 속도가 빨랐으며, $5^{\circ}$ off면이 $2.5^{\circ}$ off면보다 더 빨랐다. 결정방향에 따른 산화속도 차이는 산화 온도가 높아질수록 줄어들었다. 각 시편의 속도 상수에 대한 활성화 에너지는 포물 성장 속도 상수의 경우 (100) Si, $2.5^{\circ}$ off (100) Si, $5^{\circ}$ off Si이 각각 27.3, 25.9, 27.6 kcal/mol이였고, 선형 성장 속도 상수는 58.6, 56.6, 57.4 kcal/mol이였다. 또한, 두 시편에 대해 산화막을 선택 식각하 고 광학 현미경으로 관찰하여, (100) Si에 비해 $5^{\circ}$ off된 면의 산화에 의한 적층 결함 밀도가 훨씬 낮음을 확인하였고, 적층 결함 간의 각도가 달라짐을 확인하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.350-353
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• 2002

High voltage SiC Schottky barrier diodes with field plate structure have been fabricated and characterized. N-type 4H-SiC wafer with an epilayer of ∼10$\^$15/㎤ doping level was used as a starting material. Various Schottky metals such as Ni, Pt, Ta, Ti were sputtered and thermally-evaporated on the low-doped epilayer. Ohmic contact was formed at the backside of the SiC wafer by annealing at 950$^{\circ}C$ for 90 sec in argon using rapid thermal annealer. Field oxide of 550${\AA}$ in thickness was formed by a wet oxidation process at l150$^{\circ}C$ for 3h and subsequently heat-treated at l150$^{\circ}C$ for 30 min in argon for improving oxide quality. The turn-on voltages of the Ni/4H-SiC Schottky diode was 1.6V which was much higher than those of Pt(1.0V), Ta(0.7V) and Ti(0.7). The voltage drop was measured at the current density of 100A/$\textrm{cm}^2$ showing 2.1V for Ni Schottky diode, 1.45V for Pt 1.35V, for Ta, and 1.25V for Ti, respectively. The maximum reverse breakdown voltage was measured 1100V in the file plated Schottky diodes with 101an thick epilayer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.387-390
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• 2002

SiC direct bonding technology is very attractive for both SiCOI(SiC-on-insulator) electric devices and SiC-MEMS(micro electro mechanical system) fields because of its application possibility in harsh environments. This paper presents pre-bonding techniques with variation of HF pre-treatment conditions for 2 inch SiC wafer direct bonding using PECVD(plasma enhanced chemical vapor deposition) oxide. The PECVD oxide was characterized by XPS(X-ray photoelectron spectrometer) and AFM(atomic force microscopy). The characteristics of the bonded sample were measured under different bonding conditions of HF concentration and an applied pressure. The bonding strength was evaluated by the tensile strength method. The bonded interface was analyzed by using IR camera and SEM(scanning electron microscope). Components existed in the interlayer were analyzed by using FT-IR(fourier transform infrared spectroscopy). The bonding strength was varied with HF pre-treatment conditions before the pre-bonding in the range of $5.3 kgf/cm^2$ to $15.5 kgf/cm^2$

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.160-163
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• 2003

This paper describes on anodic bonding characteristics of MLCA(Multi Layer Ceramic Actuator) to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with same properties were deposited on MLCA under optimum RF magneto conditions(Ar 100 %, input power $1\;/cm^2$). After annealing in $450^{\circ}C$ for 1 hr, the anodic bonding of MLCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in - 760 mmHg. Then, the MLCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity is 0.05-008 %FS. Moreover, any damages or separation of MICA/Si bonded interfaces do not occur during actuation test. Therefore, it is expected that anodic bonding technology of MICA/Si wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• 한국재료학회지
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• 제20권4호
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• pp.210-216
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• 2010

This paper investigates the dependence of a-Si:H/c-Si passivation and heterojunction solar cell performances on various cleaning processes of silicon wafers. It is observed that the passivation quality of a-Si:H thin-films on c-Si wafers depends highly on the initial H-termination properties of the wafer surface. The effective minority carrier lifetime (MCLT) of highly H-terminated wafer is beneficial for obtaining high quality passivation of a-Si:H/c-Si. The wafers passivated by p(n)-doped a-Si:H layers have low MCLT regardless of the initial H-termination quality. On the other hand, the MCLT of wafers incorporating intrinsic (i) a-Si:H as a passivation layer shows sensitive variation with initial cleaning and H-termination schemes. By applying the improved cleaning processes, we can obtain an MCLT of $100{\mu}sec$ after H-termination and above $600{\mu}sec$ after i a-Si:H thin film deposition. By adapting improved cleaning processes and by improving passivation and doped layers, we can fabricate a-Si:H/c-Si heterojunction solar cells with an active area conversion efficiency of 18.42%, which cells have an open circuit voltage of 0.670V, short circuit current of $37.31\;mA/cm^2$ and fill factor of 0.7374. These cells show more than 20% pseudo efficiency measured by Suns-$V_{oc}$ with an elimination of series resistance.

• Advances in nano research
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• 제2권1호
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• pp.23-56
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• 2014

The significant growth of the Si photovoltaic industry has been so far limited due to the high cost of the Si photovoltaic system. In this regard, the most expensive factors are the intrinsic cost of silicon material and the Si solar cell fabrication processes. Conventional Si solar cells have p-n junctions inside for an efficient extraction of light-generated charge carriers. However, the p-n junction is normally formed through very expensive processes requiring very high temperature (${\sim}1000^{\circ}C$). Therefore, several systems are currently under study to form heterojunctions at low temperatures. Among them, carbon nanotube (CNT)/Si hybrid solar cells are very promising, with power conversion efficiency up to 15%. In these cells, the p-type Si layer is replaced by a semitransparent CNT film deposited at room temperature on the n-doped Si wafer, thus giving rise to an overall reduction of the total Si thickness and to the fabrication of a device with cheaper methods at low temperatures. In particular, the CNT film coating the Si wafer acts as a conductive electrode for charge carrier collection and establishes a built-in voltage for separating photocarriers. Moreover, due to the CNT film optical semitransparency, most of the incoming light is absorbed in Si; thus the efficiency of the CNT/Si device is in principle comparable to that of a conventional Si one. In this paper an overview of several factors at the basis of this device operation and of the suggested improvements to its architecture is given. In addition, still open physical/technological issues are also addressed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.147-150
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• 2003

In this paper, We fabricated a high temperature pressure sensor using SBD(silicon- direct-bonding) wafer of $Si/SiO_2$/Si-sub structure. This sensor was very sensitive because the piezoresistor is fabricated by single crystal silicon of the first layer of SDB wafer. Also, it was possible to operate the sensor at high temperature over $120^{\circ}C$ which is the temperature limitation of general silicon sensor because the piezoresistor was dielectric isolation from silicon substrate using silicon dioxide of the second layer. The sensitivity of this sensor is very high as the measured result of D2200 shows $183.6\;{\mu}V/V{\cdot}kPa$. Also, the output characteristic of linearity was very good. This sensor was available at high temperature as $300^{\circ}C$.