• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.799-802
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• 2003

In this paper a FPGA implementation of WEP protocol is described. IEEE 802.11 specifies a wired LAN equivalent data confidentiality algorithm. WEP(Wired Equivalent Privacy) is defined as protecting authorized users of a wireless LAN from casual eavesdropping. WEP use RC4 algorithm for data encryption and decryption, also it use CRC-32 algorithm for error detection. The WEP protocol is implemented using Xilinx VirtexE XCV1000E-6HQ240C FPGA chip with PCI bus interface.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.8
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• pp.1820-1826
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• 2013

Heterogeneous field sensor network between sensor to sensor is designed the CAN method to bus type structure in most using at industry. This Network is supporting a distance vector routing protocol on a characteristic structural a bus type. Also This network support to convert as making separate routing table in heterogeneous network. However distance vector routing protocol make a problem of decrease efficiency because of restriction of network expandability and low transmission process. We propose new CAN routing protocol to support network expandability and high transmission process of industry network. New CAN routing protocol structure addition priority and optional function field based on RIPv2. We established heterogeneous field sensor network, we measure data Throughput(bits/sec) for confirm new CAN routing protocol to increase efficient in industry.

• Journal of the Korea Society of Computer and Information
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• v.8 no.1
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• pp.84-89
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• 2003

In this Paper, an improved protocol is proposed by supplementing a control station for transmission cycle management. This protocol is proposed to complement the shortcomings of the conventional L-Expressnet protocol which is used for round robin process in bus topology. We analyzed the improved protocol in channel utilization viewpoint and compared the result with that of the conventional protocol. From this result, we showed that the channel utilization of the improved protocol is superior to that of the conventional protocol when a maximum normalized propagation delay is increased.

• Journal of the Korea Society of Computer and Information
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• v.8 no.2
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• pp.106-111
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• 2003

In this Paper, an improved protocol is proposed by supplementing a control station for transmission cycle management and slot-extension function. This protocol is proposed to complement the shortcomings of the conventional L-Expressnet protocol which is used for round robin process in bus topology. We analyzed the improved protocol in channel utilization viewpoint and compared the result with that of the conventional Protocol. From this result, we showed that the channel utilization of the improved protocol is superior to that of the conventional protocol when a maximum normalized propagation delay is increased.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.7
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• pp.602-610
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• 2000

In communication networks used in safety-critical systems such as control systems in nuclear power plants there exist three types of data traffic : urgent or asynchronous hard real-time data hard real-time periodic data and soft real-time periodic data. it is necessary to allocate a suitable bandwidth to each data traffic in order to meet their real-time constraints. This paper proposes a method to meet the real-time constraints for the three types of data traffic simultaneously under a timer-controlled token bus protocol or the IEEE 802.4 token bus protocol and verifies the validity of the presented method by an example. This paper derives the proper region of the high priority token hold time and the target token rotation time for each station within which the real-time constraints for the three types of data traffic are met, Since the scheduling of the data traffic may reduce the possibility of the abrupt increase of the network load this paper proposes a brief heuristic method to make a scheduling table to satisfy their real-time constraints.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.6
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• pp.506-515
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• 1990

The major purpose of this thesis is suggest the simulation algorithm for performance analysis of throughput of slotted 1-persistent CSMA/CD bus protocol in Local Area Networks. The suggested simulation algorithm processes the effect of each station group that classified by the number of collision experience. Therefore, this simulation algorithm is more effective in terms of the execute than existing algorithm that processed the effect of each station. This study suggests the method for application to the busy/idle generator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.10
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• pp.2620-2633
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• 1996

In this paper, a new high-speed local area network using a dual mode switching access (DMSA) protocol implemented on a dual unidirectional bus is described. By utilizing the implicit positionalordering of stations on a unidirectional bus, the proposed system switches between random access mode and the token access model withoug unnecessary delay. Therefore, unlike other hybrid systems such as Buzz-net and Z-net, DMSA does not show a rapid degradation in performance as the load increases. We obtain the average channel utilization and the average access delay by using a simplified analytic model. The numerical results obtained via analysis are compared to the simulation resuls for a partial validation of the approximate model. The performance characteristics of DMSA are superior delay-throughput characteristics at light and medium loads, compared to compared to other LAN systems, and the capability of providing a single active station with full capabity of the channel.

• Journal of the Korean Society for Railway
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• v.10 no.1 s.38
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• pp.88-95
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• 2007

TCN(Train Communication Network) adopts the master/slave protocol to implement real-time communication. In this network, a fault on the master node, cased by either hardware or software failure, makes the entire communication impossible over TCN. To reduce fault detection and recovery time, this paper propose the contention based mastership transfer algorithm. Slave nodes detect the fault of master node and search next master node using the proposed algorithm. This paper also shows the implementation results of a SoC-based Fault-Tolerant MVB Controller(FT-MVBC) which includes the fault-detect-logic as well as the MVB network logic to verify this algorithm.

• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.573-580
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• 2002

Reusing IPs requires interface protocol related tasks such as writing test benches and designing interface protocol conversion circuits, e.g. wrappers for IPs. The results of those tasks usually include IPC(interface protocol component)s for the corresponding IPs, similar to bus protocol components of the bus functional models. This paper proposes a methodology for the interface circuit design using synthesizable In that can be re-used. IPC recognizes or executes transactions over the given interface ports. So we present a transaction-oriented interface protocol description language, and a method to convert the description into an IPC in synthesizable VHDL code. With experiments, we show that the interface design using IPC does not cause significant area overhead compared with the interface design without IPC. The proposed IPC-based approach can be employed to reduce the interface design time since the designers can reuse IPCs without understanding the detailed interface protocols.

• Journal of IKEEE
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• v.27 no.4
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• pp.368-378
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• 2023

Automotive headlamp with LED matrix exploits low-cost low-speed serial buses such as I2C and SPI for digital LED control. When headlamp resolution increases, LED control data significantly increases to exceed capacity of control bus. This paper proposes HLCP (Headlamp LED Control Protocol), a novel LED maxtrix headlamp protocol. The proposed protocol exploits dedicated instructions to control many LEDs simultaneously, so it can control much more LEDs than conventional control buses although it is basically based on I2C bus. It is designed and verified in Verilog HDL. Simulation results show that HLCP can control LED matrix headlamp more efficiently than I2C and SPI.