• Title/Summary/Keyword: Bus Information

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A design of P1394 serial bus IC (P1394 시리얼 버스 IC의 설계)

  • 이강윤;정덕균
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.1
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    • pp.34-41
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    • 1998
  • In this paper, I designed a P1394 serial bus chip as new bus interface architecture which can transmit the multimedia data at the rate of 400 Mbps and guarantee necessary bandwidth. because multimedia data become meaningless data after appropriate time, it is necessary to transfer multimedia data in real time, P1394 serial bus chip designed in this paper support isochronous transfer mode to solve this problem. Also, designed P1394 serial bus chip can transfer high quality video data or high quality audio data because it support the speed of 400 Mbps. While user must set device ID manually in previous interface such as SCSI, device ID is automatically determined if user connect each node with designed P1394 serial bus cable and power on. To design this chip, I verified the behavioral of the entrire system and synthesized layout. Also, I did layout the analog blocks and blocks which must be optimized in full custom.

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Implementation of a block transfer protocol for a pipelined bus (파이프라인드 버스에서 블록 전송 방법의 구현)

  • 한종석;심원세;기안도;윤석한
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.9
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    • pp.70-79
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    • 1996
  • Block data transfer poses a serious problem is a pipelined bus where each data transfer step is pipelined. In this paper, we describe the design and implementation of a variable data block transfer protocol for a pipelined bus of a shared-memory multiprocessor. The proposed method maintains compatibility with the existing protocol for the pipelined bus and ensures fairness and effectiveness by preventing starvation. We present flow charts of requester and responder during a block transfer in the pipelined bus that uses the proposed protocol. The proposed protocol was implemented for the TICOM-III HiPi+Bus.

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Route Selection of the Welfare-type Community Bus in Nagasaki City

  • Yugeta, Shouhei;Watanabe, Kohei;Gotoh, Keinosuke
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.531-533
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    • 2003
  • This study aims at discussing the future trend of the community bus and attempted to route selection by using GIS for the welfare-type community bus, which satisfies the need of elderly and physically handicapped persons in Nagasaki City. In doing so, we have conducted field survey in some sample cities of Kyushu, Japan for taking lessons from the present state analysis of community bus already operating there. As a result of the study, we have been able to identify some best possible routes for the community bus operation in Nagasaki City, which meets the requirement of the welfare community as well as of the general passengers.

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Design models of PTIS in a telecommunication point of view, and implementation case at Seoul city (PTIS : Public Transportation Information System)

  • Ho, Wan-Chol;Chae, Soo-Woon
    • 한국ITS학회:학술대회논문집
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    • 2005.11a
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    • pp.83-88
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    • 2005
  • A transportation problem in Korea is a serious issue that has to be solved urgently in the motor era of 15 million vehicles. Recently ITS has been introduced to improve efficiency of the current roads because an excessive budget and a long term construction are needed to build new roads. Therefore the government enacted the law as of ITS and the in architecture. However, these ITS information services were oriented to mainly vehicles and drivers, not public entities such as bus driver, passengers and so on. Nowadays lots of local autonomous city introduced a public transportation information system (PTIS), and providing useful information for the public. For this PTIS, important design issues are to be focused on detecting and tracking technology of moving bus, and a wireless communication link to transmit the location information. This paper presents design models using several wireless communication methods, and an implementation case using a Wireless packet Data communication Network (WDN) to transmit bus location information at Seoul, Korea.

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An Empirical Study on the Factors to Affect a BIS Use and Its Vitalization Plan : Busan Metropolitan City (버스정보안내기 이용요인 및 활성화 방안에 관한 실증연구 : 부산광역시를 중심으로)

  • Kim, Soon Ja;Hong, Soon Goo;Cha, Yoon Sook;Kim, Jong Weon
    • Journal of Information Technology Services
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    • v.12 no.1
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    • pp.1-14
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    • 2013
  • The government has implemented operating the bus information terminal (hereinafter, 'BIT') to use by building it at a major bus station to solve the problem of traffic congestion. Busan Metropolitan City has been continuously expanding the installation of 'BIT' since 2003. However, there are few research on the factor to use and satisfaction survey on 'BIT' from the perspective of the users. This study, in an effort to inquire into the 'BIT' utilization factor and its vitalization plan, conducted a face to face survey of 172 citizens who had the experience in the 'BIT'. The result of the data analysis showed that usability, convenience, and availability were the critical factors for a BIT use. In addition, the general intention to use 'BIT' was found to be very high as much as 90.7%. The contributions of this study are as follows. The academic contributions is that it proved the relationship between usability, convenience and the intention to use suggested by the information technology acceptance model is supported even in case of 'BIT.' For the practitioners this study provides ground data for a local government to make a plan of a BIT extension.

Correlation Analysis between Distributed Generation Maximum Hosting Capacity of Target and Non-Target Bus (목표 및 비 목표 모선의 분산전원 최대 Hosting capacity 간의 상관관계 분석)

  • Kim, Ji-Soo;Oh, Yun-Sik;Cho, Gyu-Jung;Kim, Min-Sung;Kim, Chul-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.9
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    • pp.1317-1324
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    • 2017
  • These days, a penetration of distributed generation(DG) has increased in power system. Due to increased penetration of DG, a whole system is forced to install the maximum hosting capacity of DG. Therefore analysis between the maximum hosting capacity of DG at the target bus and the whole system is important. If we know the maximum hosting capacity, it will be able to satisfy the demand of system planner and customer. In this paper, we use a genetic algorithm to calculate the hosting capacity with optimization program using Design Analysis Kit for Optimization and Terascale Applications(DAKOTA). To consider a real system, we establish constraints and use IEEE 34 node test system. In addition, through the correlation coefficient between the target bus and the other buses, when capacity of DG at the target bus increases, we analyze which capacity of DG at the other buses will be decreased.

A Study on Development of Bus Arrival Time Prediction Algorithm by using Travel Time Pattern Recognition (통행시간 패턴인식형 버스도착시간 예측 알고리즘 개발 연구)

  • Chang, Hyunho;Yoon, Byoungjo;Lee, Jinsoo
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.39 no.6
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    • pp.833-839
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    • 2019
  • Bus Information System (BIS) collects information related to the operation of buses and provides information to users through predictive algorithms. Method of predicting through recent information in same section reflects the traffic situation of the section, but cannot reflect the characteristics of the target line. The method of predicting the historical data at the same time zone is limited in forecasting peak time with high volatility of traffic flow. Therefore, we developed a pattern recognition bus arrival time prediction algorithm which could be overcome previous limitation. This method recognize the traffic pattern of target flow and select the most similar past traffic pattern. The results of this study were compared with the BIS arrival forecast information history of Seoul. RMSE of travel time between estimated and observed was approximately 35 seconds (40 seconds in BIS) at the off-peak time and 40 seconds (60 seconds in BIS) at the peak time. This means that there is data that can represent the current traffic situation in other time zones except for the same past time zone.

Separated Address/Data Network Design for Bus Protocol compatible Network-on-Chip (버스 프로토콜 호환 가능한 네트워크-온-칩에서의 분리된 주소/데이터 네트워크 설계)

  • Chung, Seungh Ah;Lee, Jae Hoon;Kim, Sang Heon;Lee, Jae Sung;Han, Tae Hee
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.4
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    • pp.68-75
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    • 2016
  • As the number of cores and IPs increase in multiprocessor system-on-chip (MPSoC), network-on-chip (NoC) has emerged as a promising novel interconnection architecture for its parallelism and scalability. However, minimization of the latency in NoC with legacy bus IPs must be addressed. In this paper, we focus on the latency minimization problem in NoC which accommodates legacy bus protocol based IPs considering the trade-offs between hop counts and path collisions. To resolve this problem, we propose separated address/data network for independent address and data phases of bus protocol. Compared to Mesh and irregular topologies generated by TopGen, experimental results show that average latency and execution time are reduced by 19.46% and 10.55%, respectively.

A Development of Punctuality Index for Bus Operation Using Time-space Diagram (시공도를 이용한 버스운행 정시성 지표개발)

  • Yang, Ji-Young;Kim, Young-Chan;Kim, Seung-Il
    • Journal of Korean Society of Transportation
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    • v.23 no.8 s.86
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    • pp.129-138
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    • 2005
  • Since Successive introduction of BMS(Bus Management System) into the local governments has been able to collect each bus data on the road and valuate the bus operation by the quantitative index not qualitative index. we need a study on punctuality index for evaluation of service level for bus operation using bus location information. We propose punctuality index for bus operation using time-space diagram and valuate the index by application to real bus data.

Performance Analysis of Bandwidth-Aware Bus Arbitration (밴드위스 고려 버스중재방식의 성능분석)

  • Lee, Kook-Pyo;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.50-57
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    • 2011
  • Conventional bus system architectures are composed of several components such as master, arbiter, decoder and slave modules. The arbiter plays a role in bus arbitration according to the selected arbitration method, since several masters cannot use the bus concurrently. Typical priority strategies used in high performance arbiters include static priority, round robin, TDMA and lottery. Typical arbitration algorithms always consider the bus priority primarily, while the bus utilization is always ignored. In this paper, we propose an arbitration method using bus utilization for the operating block of each master. We verify the performance compared with the other arbitration methods through the TLM(Transaction Level Model). Based on the performance verification, the conventional fixed priority and round-robin arbitration methods cannot set the bus utilization. Whereas, in the case of the conventional TDMA and lottery arbitration methods, more than 100,000 cycles of bus utilization can be set by the user, exhibiting differences of actual bus utilization up to 50% and 70%, respectively. On the other hand, we confirm that for the proposed arbitration method, the matched bus utilization set by the user was above 99% using approximately 1,000 cycles.