• The KIPS Transactions:PartA
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• v.17A no.2
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• pp.103-112
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• 2010

Cluster sensor network is a sensor network where input nodes crowd densely around some nuclei. Steiner minimum tree is a tree connecting all input nodes with introducing some additional nodes called Steiner points. This paper proposes a mechanism for efficient construction of a cluster sensor network connecting all sensor nodes and base stations using connections between nodes in each belonged cluster and between every cluster, and using repetitive constructions of approximate Steiner minimum trees. In experiments, while taking 1170.5% percentages more time to build cluster sensor network than the method of Euclidian minimum spanning tree, the proposed mechanism whose time complexity is O($N^2$) could spend only 20.3 percentages more time for building 0.1% added length network in comparison with the method of Euclidian minimum spanning tree. The mechanism could curtail the built trees' average length by maximum 3.7 percentages and by average 1.9 percentages, compared with the average length of trees built by Euclidian minimum spanning tree method.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2007.05a
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• pp.655-662
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• 2007

This paper presents a disk-type capacitive sensor for simultaneous measurement of five-dimensional motions of a target. The sensor can be manufactured with a printed circuit board (PCB) such that the sensor can be integrated with its electronics in a single PCB board, whereby the manufacturing costs is considerably reduced. The sensor is optimally designed through an error analysis of possible mechanical errors. Furthermore, the sensor can correct the horizontal motion measurement errors due to the sensor installation tilting error. A proto-type PCB sensor, electronics and a test rig were built, and the effectiveness of the developed sensor was proved through experiments.

• Journal of Korea Multimedia Society
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• v.10 no.10
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• pp.1260-1270
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• 2007

Testing and diagnosis of analog circuits(or mixed-signal circuits) continue to be a hard task for test engineers and efficient test methodologies to solve these problems are needed. This paper proposes a novel analog circuits test technique using time slot specification (TSS) based built-in current sensors (BICS). A technique for location of a fault site and separation of fault type based on TSS is also presented. The proposed built-in current sensors and TSS technique has high testability, fault coverage and a capability to diagnose catastrophic faults and parametric faults in analog circuits. In order to reduce time complexity of test point insertion procedure, external output and power nodes are used for test points and the current sensors are implemented in the automatic test equipment(ATE). The digital output of BICS can be easily combined with built-in digital test modules for analog IC test.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2004.04a
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• pp.453-458
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• 2004

A capacitate sensor is a proper device for measuring high small displacement. General design parameters and procedure are discussed and a test sensor was built to have a measuring range of 100$\mu\textrm{m}$ and a sensitivity about 30nm. This sensor has too opposing electrode of comparably large area and has nominal gap distance about 150$\mu\textrm{m}$. So as to achieve a nano order displacement sensitivity, both sensor and target system have to be considered. This is important for the sensitivity can be achieved by minimizing a system total noise level in electronic type sensor application. Typical performance of the developed sensor is demonstrated in precision moving stage having 0.1$\mu\textrm{m}$ moving resolution.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.1
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• pp.248-268
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• 2018

The performance of smartphone applications are usually constrained in user interactions due to resource limitation and it promises great opportunities to improve the performance by exploring the smartphone built-in and embedded sensing techniques. However, heterogeneity in techniques, semantic gap between sensor data and usable context, and complexity of contextual situations keep the techniques from seamless integration. Relevant studies mainly focus on feasibility demonstration of emerging sensing techniques, which rarely address both general architectures and comprehensive technical solutions. Based on a proposed functional model, this investigation provides a general architecture to deal with the dynamic context for context-aware automation and decision support. In order to take advantage of the built-in sensors to improve the performance of mobile applications, an ontology-based method is employed for context modelling, linguistic variables are used for heterogeneous context presentation, and semantic distance-based rule matching is employed to customise functions to the contextual situations. A case study on mobile application authentication is conducted with smartphone built-in hardware modules. The results demonstrate the feasibility of the proposed solutions and their effectiveness in improving operational efficiency.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.2
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• pp.361-366
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• 2007

In the distribution networks, it is necessary to develop small and light voltage and current sensor for compact and digitalized switchgears. For this purpose, some researches have been continuing till now, CT(current transformer) and VT(voltage transformer) are one of that research. But conventional CT and VT have some problems, that is, have big size and saturation characteristics because of used to iron core. In this paper, CS(current sensor) and VS(voltage sensor), have some merits measuring of current and voltage magnitude as a alternated conventional equipment, were studied. So, this paper shows the process CS and VS design method, equivalent circuit and output result, respectively. As a result of this test, proposed CS and VS have linearity for the output, no saturation.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.271-274
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• 2003

This paper presents a Built-in Current Sensor that detect defects in CMOS integrated circuits using the current testing technique. This scheme employs a cross-coupled connected PMOS transistors, it is used as a current comparator. Our proposed scheme is a negligible impart on the performance of the circuit undo. test (CUT). In addition, in the normal mode of the CUT not dissipation extra power, high speed detection time and applicable deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The entire area of the test chip is $116{\times}65{\mu}m^2$. The BICS occupies only $41{\times}17{\mu}m^2$ of area in the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS technology.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1434-1444
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• 1995

Current test has recently been known to be a promising testing method in CMOS VLSI because conventional voltage test can not make sure of the complete detection of bridging, gate-oxide shorts, stuck-open faults and etc. This paper presents a new BIC(built-in current sensor) for the internal current test in CMOS logic circuit. A single phase clock is used in the BIC to reduce the control circuitry of it and to perform a self- testing for a faulty current. The BIC is designed to detect the faulty current at the end of the clock period, so that it can test the CUT(circuit under test) with much longer critical propagation delay time and larger area than conventional BICs. The circuit is composed of 18 devices and verified by using the SPICE simulator.

• Journal of Sensor Science and Technology
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• v.31 no.6
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• pp.411-417
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• 2022

In this paper, we propose a sensor with a C-shaped load cell to detect force change when a person sitting on the chair in an electrical transport-convenience vehicle is pushing ground by both heels. The load cell built in the vehicle is mechanically deformed by the vertical force owing to the human weight and the horizontal force by ground-pushing feet. The deformation rate of the load cell and its distribution are simulated using finite element analysis. In the simulation, the applied loads are preset in the range of 10 kg - 100 kg with a step size of 10 kg, and the ground-pushing force by feet is increased to 40 N with a step size of 5 N with respect to each applied load level. The resistance change of the load cell was observed to be linear in simulation as well as in measurement. the maximum difference between simulation and measurement was 0.89 % when the strain gauge constant was 2.243. The constant has a large influence on the difference. The proposed sensor was fabricated by connecting an instrument amplifier and a microcontroller to a load cell and used to detect the force by ground-pushing feet. To detect foot driving, the reference signal was set to 130% of the load, and the duration of the sensor output signal exceeding the reference signal was set to 0.6 s. In a test of a vehicle built with the proposed sensor, the footpushing force by the worker could be successfully detected even when the worker was working.

• The Journal of the Acoustical Society of Korea
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• v.18 no.3
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• pp.43-48
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• 1999

IDDQ testing is one of current testing methodologies which increases circuit's reliability by means of finding defects which can't be detected by functional testing in CMOS circuits. In this paper, we design a Built-In Current Sensor(BICS) circuit, which can be embedded in chip under test, that performs IDDQ testing. Furthermore, it is designed for IDDQ testing of memories and implemented to carry out testing at high-speed by using small number of transistors.