• Transactions on Electrical and Electronic Materials
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• 제6권3호
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• pp.101-105
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• 2005

Electroluminescence(EL) and current-voltage(I-V) characteristics of hybrid EL devices containing Pr and Mn co-doped ZnS nanoparticles were investigated in this study. For the insertion of a hole transport layer of poly (N-vinyl carbazole)(PVK), the current level became lower due to the accumulation of electrons at the interface between PVK and nanoparticles. When both PVK and buffer layer $BaF_2$ were simultaneously introduced, the enhanced EL efficiency and improved I-V characteristics were obtained. This results from the additional increase of hole injection owing to the internal field induced by the significant accumulation of electrons at the interface. The presence of buffer layer $BaF_2$ together with PVK makes it possible the charge accumulation enough to induce the sufficient internal field for further hole injection.

• ETRI Journal
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• 제36권6호
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• pp.931-941
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• 2014

Many methodologies for clock mesh networks have been introduced for two-dimensional integrated circuit clock distribution networks, such as methods to reduce the total wirelength for power consumption and to reduce the clock skew variation through consideration of buffer placement and sizing. In this paper, we present a methodology for clock mesh to reduce both the clock skew and the total wirelength in three-dimensional integrated circuits. To reduce the total wirelength, we construct a smaller mesh size on a die where the clock source is not directly connected. We also insert through-silicon vias (TSVs) to distribute the clock signal using an effective clock TSV insertion algorithm, which can reduce the total wirelength on each die. The results of our proposed methods show that the total wirelength was reduced by 12.2%, the clock skew by 16.11%, and the clock skew variation by 11.74%, on average. These advantages are possible through increasing the buffer area by 2.49% on the benchmark circuits.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.112-112
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• 2009

In this study, the effect of a long post-deposition thermal annealing(600 and 1000 $^{\circ}C$) on the surface acoustic wave (SAW) properties of polycrystalline (poly) aluminum-nitride (AlN) thin films grown on a 3C-SiC buffer layer was investigates. The poly-AlN thin films with a (0002) preferred orientation were deposited on the substrates by using a pulsed reactive magnetron sputtering system. Experimental results show that the texture degree of AlN thin film was reduced along the increase in annealing temperature, which caused the decrease in the electromechanical coupling coefficient ($k^2$). The SAW velocity also was decreased slightly by the increase in root mean square (RMS) roughness over annealing temperature. However, the residual stress in films almost was not affect by thermal annealing process due to small lattice mismatch different and similar coefficient temperature expansion (CTE) between AlN and 3C-SiC. After the AlN film annealed at 1000 $^{\circ}C$, the insertion loss of an $IDT/AlN/3C-SiC/SiO_2/Si$ structure (-16.44 dB) was reduced by 8.79 dB in comparison with that of the as-deposited film (-25.23 dB). The improvement in the insertion loss of the film was fined according to the decrease in the grain size. The characteristics of AlN thin films were also evaluated using Fourier transform-infrared spectroscopy (FT-IR) spectra and X-ray diffraction (XRD), scanning electron microscopy (SEM), and atomic force microscopy (AFM) images.

• 한국멀티미디어학회논문지
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• 제10권11호
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• pp.1384-1397
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• 2007

본 논문은 데이터 스트림의 하이브리드 질의를 위한 빠른 저장 방법을 제안한다. 빠르고 많은 입력을 가지는 데이터 스트림의 처리를 위해 DSMS(Data Stream Management System)란 새로운 시스템에 대한 연구가 활발히 진행되고 있다. 현재 입력되고 있는 데이터 스트림과 과거에 발생했던 데이터 스트림를 동시에 검색하는 하이브리드 질의를 위해서는 데이터 스트림이 디스크에 저장되어져야 한다. 그러나 데이터 스트림의 빠른 입력 속도와 메모리와 디스크 공간의 한계 때문에 저장된 데이터 스트림에 대한 질의보다는, 현재 입력되고 있는 데이터 스트림에 대한 질의에 대한 연구들이 주로 이루어졌다. 본 논문에서는 데이터 스트림의 입력을 받을 때 순환버퍼를 이용하여 메모리 이용률을 최대화하고 블록킹 없는 데이터 스트림의 입력을 가능하게 한다. 또한 최대한 많은 양의 데이터를 디스크에 저장하기 위하여 디스크에 있는 데이터를 압축한다. 실험을 통하여 제안되는 기술이 대량으로 입력되는 데이터 스트림을 빠르게 저장시킬 수 있다는 것을 보인다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 센서 박막재료 반도체재료 기술교육
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• pp.111-118
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• 2002

A new lithium niobate optical modulator with a polymer buffer layer on Ni in-diffused optical waveguide is proposed for the fist time, successfully fabricated and examined at a wavelength of 1.3 mm. By determining the diffusion parameters of Ni in-diffused waveguide to achieve more desirable mode size which is well matched to the mode in the fiber, the detailed results on the achievement of high optical throughput are reported. In addition, the usefulness of polymer buffer layer which can be applicable to a buffer layer in Ni in-diffused waveguide devices is demonstrated. Several sets of channel waveguides fabricated on Z-cut lithium niobate by Ni in-diffusion were obtained and on which coplanar traveling-wave type electrodes with a polymer-employed buffer layer were developed by a conventional fabrication method for characterizing of electro-optical performances of the proposed device. The experimental results show that the measured half-wave voltage is of ~10 V and the total measured fiber-to-fiber insertion loss is of ~6.4 dB for a 40 mm long at a wavelength of =1.3 mm, respectively. From the experimental results, it is confirmed that the polymer-employed buffer layer in LiNbO3 optical modulator can be a substitute material instead of silicon oxide layer which is usually processed at a high temperature of over $300^{\circ}C$. Moreover, the fabrication tolerances by using polymer materials in LiNbO3 optical modulators are much less strict in comparison to the case of dielectric buffer layer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.277-278
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• 2005

Admittance Spectroscopic analysis was applied to study the effect of LiF buffer layer and to model the equivalent circuit for poly(2-methoxy-5-(2'-ethylhexyloxy)-1,4-phenylenevinylene) (MEH-PPV)-based polymer light emitting diodes (PLEDs) with the LiF cathode buffer layer. The single layer device with ITO/MEH-PPV/Al structure can be modeled as a simple parallel combination of resistor and capacitor. Insertion of a LiF layer at the Al/MEH-PPV interface shifts the highest occupied molecular orbital level and the vacuum level of the MEH-PPV layer as a result the barrier height for electron injection at the Al/MEH-PPV interface is reduced. The admittance spectroscopy measurement of the devices with the LiF cathode buffer layer shows reduction in contact resistance ($R_c$), parallel resistance ($R_p$) and increment in parallel capacitance ($C_p$).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 제5회 영호남 학술대회 논문집
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• pp.81-84
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• 2003

Conductive polyaniline(PANI)-camphosulfonic acid (CSA) film applied as a hole injection layer in ITO/PANI/P3HT/LiF/Al device. In the AFM images, electrochemically polymerized PANI-CSA films have the small particles and smooth sufficient for application as hole injection layer. By insertion of PANI-CSA buffer layer, the turn on voltage of ITO/PANI/P3HT/LiF/Al device lowed by 3V, whereas that of ITO/P3HT/LiF/Al device shows 5V.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기물성,응용부문
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• pp.230-233
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• 2002

A new lithium niobate optical modulator with a polymer buffer layer on Ni in-diffused optical waveguide is proposed for the fist time, successfully fabricated and examined at a wavelength of 1.3 ${\mu}m$. The experimental results show that the measured half-wave voltage is of ${\sim}10$ V and the total measured fiber-to-fiber insertion loss is of ${\sim}-6.4$ dB for a 40 mm long waveguide at a wavelength of 1.3 ${\mu}m$, respectively.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.275.1-275.1
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• 2014

The effects of the interfacial buffer layer and temperature on the organic bulk heterojunction (BHJ) nanostructures of copper phthalocyanine (CuPc) and fullerene (C60) systems were investigated using real time in-situ x-ray scattering. In the CuPc:C60 BHJ structures, standing-on configured ${\gamma}$-CuPc phase was formed by co-deposition of CuPc and C60. Once formed ${\gamma}$-phase was thermally stable during the annealing upon $180^{\circ}C$. Meanwhile, the insertion of CuI buffer layer prior to deposition of the CuPc:C60 BHJ layer induced lying-down configured CuPc crystals in the BHJ layer. The lying CuPc peak intensity and the lattice parameter were increased by the thermal annealing. This increment of the intensity seemed to be related to the strain at the interface between CuPc:C60 and CuI, which was proportional to the enhancement of the power conversion efficiency of the device.

• 한국자기학회지
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• 제9권6호
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• pp.306-311
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• 1999

Water-based sol-gel 법으로 La2/3Sr1/3MnO3(LSMO)/YSZ/SiO2/Si(100) 다결정체 박막을 제조하여 YSZ 중간층 도입에 따른 상온, 120 Oe의 저 자장영역에서 측정한 tunnel-type 자기저항 변화에 미치는 영향에 대하여 고찰하였다. 페롭스카이트 단일상을 갖는 미세한 LSMO 박막을 얻을 수 있었으며, YSZ 중간층을 도입하지 않은 박막의 자기저항 변화비는 최대 약 0.20%이었으나, YSZ 중간층을 도입한 경우 자기저항비가 0.42%로 증가하였다. 이러한 tunnel-type 자기저항의 증가 현상은 YSZ 중간층이 SiO2/Si(100) 기판과 La2/3Sr1/3MnO. 자성박막 사이에서 확산 장벽층으로서의 역할을 수행하여 LSMO 박막의 미세구조 특성 향상 및 확산반응에 의하여 생성된 dead layer를 감소시켜 나타난 결과이다.