• 제목/요약/키워드: Bottom-up Gap-fill

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Dual Damascene 공정에서 Bottom-up Gap-fill 메커니즘을 이용한 Cu Plating 두께 최적화 (Cu Plating Thickness Optimization by Bottom-up Gap-fill Mechanism in Dual Damascene Process)

  • 유해영;김남훈;김상용;장의구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.93-94
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    • 2005
  • Cu metallization using electrochemical plating(ECP) has played an important role in back end of line(BEOL) interconnect formation. In this work, we studied the optimized copper thickness using Bottom-up Gap-fill in Cu ECP, which is closely related with the pattern dependencies in Cu ECP and Cu dual damascene process at 0.13 ${\mu}m$ technology node. In order to select an optimized Cu ECP thickness, we examined Cu ECP bulge, Cu CMP dishing and electrical properties of via hole and line trench over dual damascene patterned wafers split into different ECP Cu thickness.

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Gap-Fill Characteristics and Film Properties of DMDMOS Fabricated by an F-CVD System

  • Lee, Woojin;Fukazawa, Atsuki;Choa, Yong-Ho
    • 한국재료학회지
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    • 제26권9호
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    • pp.455-459
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    • 2016
  • The deposition process for the gap-filling of sub-micrometer trenches using DMDMOS, $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by flowable chemical vapor deposition (F-CVD) is presented. We obtained low-k films that possess superior gap-filling properties on trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on IMD and STI for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universal in other chemical vapor deposition systems.

Effect of a Multi-Step Gap-Filling Process to Improve Adhesion between Low-K Films and Metal Patterns

  • Lee, Woojin;Kim, Tae Hyung;Choa, Yong-Ho
    • 한국재료학회지
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    • 제26권8호
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    • pp.427-429
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    • 2016
  • A multi-step deposition process for the gap-filling of submicrometer trenches using dimethyldimethoxysilane (DMDMOS), $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by plasma enhanced chemical vapor deposition (PECVD) is presented. The multi-step process consisted of pre-treatment, deposition, and post-treatment in each deposition step. We obtained low-k films with superior gap-filling properties on the trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on inter metal dielectric (IMD) and shallow trench isolation (STI) processes for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universally for other chemical vapor deposition systems.