• Title/Summary/Keyword: Bottleneck Machine

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A Lightweight Software-Defined Routing Scheme for 5G URLLC in Bottleneck Networks

  • Math, Sa;Tam, Prohim;Kim, Seokhoon
    • Journal of Internet Computing and Services
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    • v.23 no.2
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    • pp.1-7
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    • 2022
  • Machine learning (ML) algorithms have been intended to seamlessly collaborate for enabling intelligent networking in terms of massive service differentiation, prediction, and provides high-accuracy recommendation systems. Mobile edge computing (MEC) servers are located close to the edge networks to overcome the responsibility for massive requests from user devices and perform local service offloading. Moreover, there are required lightweight methods for handling real-time Internet of Things (IoT) communication perspectives, especially for ultra-reliable low-latency communication (URLLC) and optimal resource utilization. To overcome the abovementioned issues, this paper proposed an intelligent scheme for traffic steering based on the integration of MEC and lightweight ML, namely support vector machine (SVM) for effectively routing for lightweight and resource constraint networks. The scheme provides dynamic resource handling for the real-time IoT user systems based on the awareness of obvious network statues. The system evaluations were conducted by utillizing computer software simulations, and the proposed approach is remarkably outperformed the conventional schemes in terms of significant QoS metrics, including communication latency, reliability, and communication throughput.

An efficient algorithm for scheduling parallel machines with multiple servers (다중 서버를 사용하는 병렬 머신 스케줄링을 위한 효율적인 알고리즘)

  • Chong, Kyun-Rak
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.6
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    • pp.101-108
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    • 2014
  • The parallel machine scheduling is to schedule each job to exactly one parallel machine so that the total completion time is minimized. It is used in various manufacturing system areas such as steel industries, semiconductor manufacturing and plastic industries. Each job has a setup phase and a processing phase. A removal phase is needed in some application areas. A processing phase is performed by a parallel machine alone while a setup phase and a removal phase are performed by both a server and a parallel machine simultaneously. Most of previous researches used a single server and considered only a setup phase and a processing phase. If a single server is used for scheduling, the bottleneck in the server increases the total completion time. Even though the number of parallel machines is increased, the total completion time is not reduced significantly. In this paper, we have proposed an efficient algorithm for the parallel machine scheduling using multiple servers and considering setup, processing and removal phases. We also have investigated experimentally how the number of servers and the number of parallel machines affect the total completion time.

- Development of an Algorithm for a Re-entrant Safety Parallel Machine Problem Using Roll out Algorithm - (Roll out 알고리듬을 이용한 반복 작업을 하는 안전병렬기계 알고리듬 개발)

  • Baek Jong Kwan;Kim Hyung Jun
    • Journal of the Korea Safety Management & Science
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    • v.6 no.4
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    • pp.155-170
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    • 2004
  • Among the semiconductor If-chips, unlike memory chips, a majority of Application Specific IC(ASIC) products are produced by customer orders, and meeting the customer specified due date is a critical issue for the case. However, to the one who understands the nature of semiconductor manufacturing, it does not take much effort to realize the difficulty of meeting the given specific production due dates. Due to its multi-layered feature of products, to be completed, a semiconductor product(called device) enters into the fabrication manufacturing process(FAB) repeatedly as many times as the number of the product specified layers, and fabrication processes of individual layers are composed with similar but not identical unit processes. The unit process called photo-lithography is the only process where every layer must pass through. This re-entrant feature of FAB makes predicting and planning of due date of an ordered batch of devices difficult. Parallel machines problem in the photo process, which is bottleneck process, is solved with restricted roll out algorithm. Roll out algorithm is a method of solving the problem by embedding it within a dynamic programming framework. Restricted roll out algorithm Is roll out algorithm that restricted alternative states to decrease the solving time and improve the result. Results of simulation test in condition as same as real FAB facilities show the effectiveness of the developed algorithm.

Performance Analysis of Scheduling Rules in Semiconductor Wafer Fabrication (반도체 웨이퍼 제조공정에서의 스케줄링 규칙들의 성능 분석)

  • 정봉주
    • Journal of the Korea Society for Simulation
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    • v.8 no.3
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    • pp.49-66
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    • 1999
  • Semiconductor wafer fabrication is known to be one of the most complex manufacturing processes due to process intricacy, random yields, product diversity, and rapid changing technologies. In this study we are concerned with the impact of lot release and dispatching policies on the performance of semiconductor wafer fabrication facilities. We consider several semiconductor wafer fabrication environments according to the machine failure types such as no failure, normal MTBF, bottleneck with low MTBF, high randomness, and high MTBF cases. Lot release rules to be considered are Deterministic, Poisson process, WR(Workload Regulation), SA(Starvation Avoidance), and Multi-SA. These rules are combined with several dispatching rules such as FIFO (First In First Out), SRPT (Shortest Remaining Processing Time), and NING/M(smallest Number In Next Queue per Machine). We applied the combined policies to each of semiconductor wafer fabrication environments. These policies are assessed in terms of throughput and flow time. Basically Weins fabrication setup was used to make the simulation models. The simulation parameters were obtained through the preliminary simulation experiments. The key results throughout the simulation experiments is that Multi-SA and SA are the most robust rules, which give mostly good performance for any wafer fabrication environments when used with any dispatching rules. The more important result is that for each of wafer fabrication environments there exist the best and worst choices of lot release and dispatching policies. For example, the Poisson release rule results in the least throughput and largest flow time without regard to failure types and dispatching rules.

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Intelligent Massive Traffic Handling Scheme in 5G Bottleneck Backhaul Networks

  • Tam, Prohim;Math, Sa;Kim, Seokhoon
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.3
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    • pp.874-890
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    • 2021
  • With the widespread deployment of the fifth-generation (5G) communication networks, various real-time applications are rapidly increasing and generating massive traffic on backhaul network environments. In this scenario, network congestion will occur when the communication and computation resources exceed the maximum available capacity, which severely degrades the network performance. To alleviate this problem, this paper proposed an intelligent resource allocation (IRA) to integrate with the extant resource adjustment (ERA) approach mainly based on the convergence of support vector machine (SVM) algorithm, software-defined networking (SDN), and mobile edge computing (MEC) paradigms. The proposed scheme acquires predictable schedules to adapt the downlink (DL) transmission towards off-peak hour intervals as a predominant priority. Accordingly, the peak hour bandwidth resources for serving real-time uplink (UL) transmission enlarge its capacity for a variety of mission-critical applications. Furthermore, to advance and boost gateway computation resources, MEC servers are implemented and integrated with the proposed scheme in this study. In the conclusive simulation results, the performance evaluation analyzes and compares the proposed scheme with the conventional approach over a variety of QoS metrics including network delay, jitter, packet drop ratio, packet delivery ratio, and throughput.

The Use of Haar Cascade Result selection algorithm to check Wearing Masks and Fever Abnormality (Haar Cascade 결괏값 선별 알고리즘을 통한 마스크 착용 여부와 발열 체크)

  • Kim, Eui-Jeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.2
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    • pp.193-198
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    • 2022
  • Recently, place that you need to check wearing mask and body temperature to prevent the proliferation of COVID-19 increased. But these things often measured by man manually or by machine one by one, result may be different by measuring ways, so it wastes workforce. Also, the machine generally just measures the highest temperature of the face, criteria for fever can't be trusted too. A bottleneck may occur due to crowding of people at the entrance, and because most of the measurement sites are at one entrance, it is inconvenient to track the movement of COVID-19 Confirmed cases. Thus, in this study, we intend to propose a method for suppressing the spread of infection by automatically classifying and displaying in real time using camera, thermal camera, Haar Cascade, and result selection algorithm.

A Study on Throughput Increase in Semiconductor Package Process of K Manufacturing Company Using a Simulation Model (시뮬레이션 모델을 이용한 K회사 반도체 패키지 공정의 생산량 증가를 위한 연구)

  • Chai, Jong-In;Park, Yang-Byung
    • Journal of the Korea Society for Simulation
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    • v.19 no.1
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    • pp.1-11
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    • 2010
  • K company produces semiconductor package products under the make-to-order policy to supply for domestic and foreign semiconductor manufacturing companies. Its production process is a machine-paced assembly line type, which consists of die sawing, assembly, and test. This paper suggests three plans to increase process throughput based on the process analysis of K company and evaluates them via a simulation model using a real data collected. The three plans are line balancing by adding machines to the bottleneck process, product group scheduling, and reallocation of the operators in non-bottleneck processes. The evaluation result shows the highest daily throughput increase of 17.3% with an effect of 2.8% reduction of due date violation when the three plans are applied together. Payback period for the mixed application of the three plans is obtained as 1.37 years.

Feeder Re-assign Problem in a Surface Mount Device with a Piano-Type Multi-Headed Gantry

  • Tae, Hyunchul;Kim, Byung-In
    • Industrial Engineering and Management Systems
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    • v.12 no.4
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    • pp.330-335
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    • 2013
  • A surface mount device (SMD) assembles electronic components on printed circuit boards (PCB). Since a component assembly process is a bottleneck process in a PCB assembly line, making an efficient SMD plan is critical in increasing the PCB assembly line productivity. Feeder assignment is an important part of the SMD plan optimization. In this paper, we propose a feeder re-assign improvement algorithm for a specific type of SMD machine with a piano type multi-head gantry. Computational results on some real-world benchmark data sets show the effectiveness of our proposed algorithm.

Two phase p-median approach to nondegenerate GT cell formation (GT 생산시스템에서 비퇴화 셀 형성을 위한 2 단계 p-median 접근법)

  • 원유경
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2001.10a
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    • pp.21-24
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    • 2001
  • This study is concerned with the development of efficient p-median approach to nondegenerate cell formation(CF) in group technology(GT) manufacturing. Unlike most of existing CF methodologies allowing degenerate cells or families that contains no parts or machines, this study attempts to find cell configuration where each machine cell contains at least two or more machines processing at least two or more parts so as to fully utilize the similarity in designing and processing parts. Nondegenerate CF seeks to minimize both the exceptional elements outside the diagonal block and the voids within the diagonal block. To find nondegenerate cells, a two-phase p-median methodology is proposed. In phase 1, the classical p-median model is implemented to find initial cells. In phase 2, bottleneck machines and parts are reassigned until no further degenerate cells and families are found. Test results on moderately medium-sized CF problems show the substantial efficiency of the proposed approach.

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An Analysis of Hyd-Cylinder Shop Facilities Planning by Simulation (시뮬레이션 기법을 이용한 유압생산부 설비배치 계획의 분석)

  • Chung, K.H.;Chung, S.W.;Park, D.H.;Kim, J.C.;Kwon, K.Y.
    • IE interfaces
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    • v.5 no.2
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    • pp.39-52
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    • 1992
  • This paper presents alternatives for facilities planning and analyses them using simulation approach. For this purpose, hydro-cylinder production line was sampled as a case study. Several facilities planning alternatives are evaluated based on the several factors such as line balancing, equipment utilization, optimum number of equipments, inventory size, flow time, bottleneck machine, and productive capacity. An optimal facilities planning is proposed based on the degree of meeting with the all factors evaluated. The simulation language employed in this study is SIMAN and the data used for simulation are provided by hydro-cylinder shop.

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