• Progress in Superconductivity
• /
• 제9권1호
• /
• pp.62-67
• /
• 2007

The effects of the heat-treatment temperature on the carbon (C) substitution amount, full width at half maximum (FWHM) value, critical temperature ($T_c$), critical current density ($J_c$) have been investigated for 10 wt % malic acid ($C_4H_6O_5$)-doped $MgB_2/Fe$ wires. All the samples were fabricated by the in-situ powder-in-tube (PIT) method and heat-treated within a temperature range of $650^{\circ}C$ to $1000^{\circ}C$. As the heat-treatment temperature increased, it seemed that the lattice distortion was increased by a more active C substitution into the boron sites from the malic acid addition. These increased electron scattering defects seemed to enhance the $J_c-H$ properties in spite of an improvement in the crystallinity, such as a decrease of the FWHM value and an increase of the $T_c$. Compared to the un-doped wire heat-treated at $650^{\circ}C$ for 30 min, the $J_c$ was enhanced by the C doping in a high-field regime. The wire heat-treated at $900^{\circ}C$ resulted in a higher magnetic $J_c$ of approximately $10^4\;A/cm^2$ at 5 K and 8 T.

• 한국신재생에너지학회:학술대회논문집
• /
• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
• /
• pp.112.1-112.1
• /
• 2011

The back contact solar cell (BCSC) has several advantages compared to the conventional solar cell since it can reduce grid shadowing loss and contact resistance between the electrode and the silicon substrate. This paper presents the effect of the surface texturing of the silicon BCSC by varying the texturing depth or the texturing gap in the commercially available simulation software, ATHENA and ATLAS of the company SILVACO. The texturing depth was varied from $5{\mu}m$ to $150{\mu}m$ and the texturing gap was varied from $1{\mu}m$ to $100{\mu}m$ in the simulation. The resulting efficiency of the silicon BCSC was evaluated depending on the texturing condition. The quantum efficiency and the I-V curve of the designed silicon BCSC was also obtained for the analysis since they are closely related with the solar cell efficiency. Other parameters of the simulated silicon BCSC are as follows. The substrate was an n-type silicon, which was doped with phosphorous at $6{\times}10^{15}cm^{-3}$, and its thickness was $180{\mu}m$, a typical thickness of commercial solar cell substrate thickness. The back surface field (BSF) was $1{\times}10^{20}\;cm^{-3}$ and the doping concentration of a boron doped emitter was $8.5{\times}10^{19}\;cm^{-3}$. The pitch of the silicon BCSC was $1250{\mu}m$ and the anti-reflection coating (ARC) SiN thickness was $0.079{\mu}m$. It was assumed that the texturing was anisotropic etching of crystalline silicon, resulting in texturing angle of 54.7 degrees. The best efficiency was 25.6264% when texturing depth was $50{\mu}m$ with zero texturing gap in case of low texturing depth (< $100{\mu}m$).

• 한국정보통신학회논문지
• /
• 제21권1호
• /
• pp.223-228
• /
• 2017

본 연구에서는 광대역 펄스감마선 탐지센서 최적화 설계를 수행하고 설계결과를 기반으로 탐지센서를 제작하여 전기적 특성을 분석하였다. 탐지센서의 최적화 설계를 위해 펄스감마선의 시간에 따른 에너지 프로파일로 부터 입력 변수를 도출하고 탐지감도 제어회로를 통하여 출력전류 범위를 결정하였다. 도출된 변수를 바탕으로 N-type Epi Wafer 및 TCAD(Technology Computer Aided Design)로 설계하고 제작하였다. 제작된 탐지센서의 전기적 특성 분석 결과 -3.3V 전압에서 12pA의 누설전류와 -5V의 전압에서 완전 공핍화 되는 특성을 가짐을 확인하였다. 제작된 센서의 포항가속기연구소 TEST LINAC 시험결과 감마선 설정 선율의 펄스방사선에 대해 고감도의 광전류를 생성시킴을 확인하였다.

• 한국신재생에너지학회:학술대회논문집
• /
• 한국신재생에너지학회 2007년도 추계학술대회 논문집
• /
• pp.275-277
• /
• 2007

유리를 기판으로 하는 superstrate pin 비정질 태양전지에서 전면투명전도막(TCO)과 p-layer의 계면이 태양전지의 효율을 내는데 가장 큰 기여를 한다. 전면투명전도막(TCO)으로 현재 일반적으로 사용되는 ZnO:Al는 $SnO_2:F$ 보다 전기,광학적으로 우수하고, 안개율(Haze)높으며, 수소 플라즈마에서의 안정성이 높은 특정을 갖고 있다. 그래서 박막 태양전지 특성향상에 매우 유리하나, 태양전지로 제조했을 때, $SnO_2:F$보다 충진율(Fill factor:F.F)과 V_{\infty}$ 가 감소한다는 단점을 가지고 있다. 본 실험실에서는 $SnO_2:F$의 F.F가 72%이 나온 반면 ZnO:Al의 F.F은 68%에 그쳤다. 이들 원인을 분석하기 위해 TCO/p-layer의 전기적 특성을 알아 본 결과, $SnO_2:F$보다 ZnO:Al의 직렬저항이 높게 측정되었다. 이러한 결과를 바탕으로 p-layer 에 R={$H_2/SiH_4$}=25로 변화, p ${\mu$}c$-Si:H/p a-SiC:H 로 p-layer 이중 증착, p-layer의 boron doping 농도를 증가시키는 실험을 하였다. 직렬저항이 가장 낮았던 p ${\mu$}c$-Si:H/p a-SiC:H 로 p-layer 이중 증착에서 Voc는 0.95V F.F는 70% 이상이 나왔다. 이들 각 p층의 $E_a$(Activation Energy)를 구해본 결과, ${\mu$}c$-Si:H의 Ea 가 가장 낮은 것을 관찰 할 수 있었다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제6권2호
• /
• pp.61-67
• /
• 2006

We fabricate local damascene FinFET cell array in sub-60nm feature sized DRAM. The local damascene structure can remove passing-gate-effects in FinFET cell array. p+ boron in-situ doped polysilicon is chosen for the gate material, and we obtain a uniform distribution of threshold voltages at around 0.7V. Sub-threshold swing of 75mV/d and extrapolated off-state leakage current of 0.03fA are obtained, which are much suppressed values against those of recessed channel array transistors. We also obtain a few times higher on-state current. Based on the improved on- and off-state current characteristics, we expect that the FinFET cell array could be a new mainstream structure in sub-60nm DRAM devices, satisfying high density, low power, and high-speed device requirements.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2019년도 전력전자학술대회
• /
• pp.230-232
• /
• 2019

Light Triggerd Thyristor (LTT)는 HVDC 및 산업용 스위치 등에 사용되는 대전력 반도체소자이다. 일반적인 Thyristor가 전기적 신호에 의해 trigger 되는 것과는 다르게 LTT는 광신호에 의해 동작하는 소자이다. 본 논문에서는 5,000V, 2,200A 급의 4인치 LTT 소자의 제작 및 전기적인 특성평가 결과를 기술하였다. 4인치 LTT의 구조적인 특징은 전면부 중앙에 광신호가 주입되는 수광부가 위치해 있으며 입력 전류 증폭을 위한 4-단계 증폭 게이트 (gate) 구조를 가지도록 설계하였다. $400{\Omega}{\cdot}cm$ 비저항을 갖는 1mm 두께의 n-형 실리콘 웨이퍼에 boron 이온주입과 열처리 공정으로 약 $30{\mu}m$ 깊이의 p-base를 형성하였으며, 고내압 저지를 위한 edge termination은 VLD (variable lateral doping) 기술을 적용하였다. 제작된 4인치 LTT는 6,500 V의 순방향 항복전압 ($V_{DRM}$) 특성을 나타내었으며, 100V의 어노드전압 ($V_A$)과 20 mA의 게이트전류 ($I_G$)에 의하여 thyristor가 trigger 됨을 확인하였다. 제작한 LTT 소자는 disk형 press-pack 패키지를 진행한 후, LTT의 수광부에 $10{\mu}s$, 50 mW의 900 nm 광 펄스를 조사하여 전류 특성을 평가하였다. LTT 패키지 샘플에 60 Hz 주파수의 광 펄스를 조사한 경우 2,460 A의 순방향 평균전류 ($I_T$)와 $336A/{\mu}s$의 반복전류상승기울기 (repetitive di/dt)에 안정적으로 동작함을 확인하였다. 또한, 펄스 전류 시험의 경우 61.6 kA의 최대 통전 전류 (ITSM, surge current)와 $1,050A/{\mu}s$의 펄스전류 상승 기울기 (di/dt of on-state pulse current)에도 LTT의 손상 없이 동작함을 확인하였다.

• 공업화학
• /
• 제21권1호
• /
• pp.29-33
• /
• 2010

본 연구에서는 여러 가지 열처리 온도에서 다성분 도핑에 의한 광촉매의 밴드갭 저감 및 가시광 광분해 효과를 알아보고자 tetraethylammonium tetrafluoroborate (TEATFB)로 B, C, N, F 등이 동시에 도핑된 $TiO_{2}$ 광촉매를 제조하였다. 도핑된 $TiO_{2}$ 광촉매가 가시광선영역에서 분해되는 정도를 확인하기 위해서 태양광에 조사하여 rhodamine B와 acridine orange로 염료분해 실험을 수행하였다. XRD 결과 $800^{\circ}C$ 이하에서 열처리된 $TiO_{2}$ 광촉매는 anatase 구조가 존재하고 있음을 알 수 있었다. XPS 분석을 통하여 광활성에 영향을 미치는 B, C, N, F의 결합구조를 확인하였고 UV-DRS 결과로부터 다성분 도핑된 $TiO_{2}$ 광촉매의 밴드 갭이 2.98 eV로 줄어든 것을 알 수 있었다. 다성분 도핑 $TiO_{2}$의 태양광 조사에 의한 UV-Vis 결과에서 acridine orange에 대한 광분해 효과가 도핑되지 않은 샘플에 비해 1.61배 증가함을 알 수 있었다. 특히, 다성분이 동시 도핑되고 $700^{\circ}C$에서 열처리된 샘플이 acridine orange과 rhodamine B 두 가지 염료 모두에서 가장 좋은 광분해 효과를 보여 주었다.

• 한국환경과학회지
• /
• 제20권10호
• /
• pp.1273-1284
• /
• 2011

The aim of this research was to evaluate the performance of insoluble electrode for the purpose of degradation of Rhodamine B (RhB) and oxidants generation [N,N-Dimethyl-4-nitrosoaniline (RNO, indicator of OH radical), $O_3$, $H_2O_2$, free Cl, $ClO_2$)]. Methods: Four kinds of electrodes were used for comparison: DSA (dimensional stable anode; Pt and JP202 electrode), Pb and boron doping diamond (BDD) electrode. The effect of applied current (0.5~2.5 A), electrolyte type (NaCl, KCl and $Na_2SO_4$) and electrolyte concentration (0.5~3.5 g/L) on the RNO degradation were evaluated. Experimental results showed that the order of RhB removal efficiency lie in: JP202 > Pb > BDD ${\fallingdotseq}$ > Pt. However, when concerned the electric power on maintaining current of 1 A during electrolysis reaction, the order of RhB removal efficiency was changed: JP202 > Pt ${\fallingdotseq}$ Pb > BDD. The total generated oxidants ($H_2O_2$, $O_3$, free Cl, $ClO_2$) concentration of 4 electrodes was Pt (6.04 mg/W) > JP202 (4.81 mg/W) > Pb (3.61 mg/W) > BDD (1.54 mg/W), respectively. JP202 electrode was the best electrode among 4 electrodes from the point of view of performance and energy consumption. Regardless of the type of electrode, RNO removal of NaCl and KCl (chlorine type electrolyte) were higher than that of the $Na_2SO_4$ (sulfuric type electrolyte) RNO removal. Except BDD electrode, RhB degradation and creation tendency of oxidants such as $H_2O_2$, $O_3$, free Cl and $ClO_2$, found that do not match. RNO degradation tendency were considered a simple way to decide the method which is simple it will be able to determinate the electrode where the organic matter decomposition performance is superior. As the added NaCl concentration was increases, the of hydrogen peroxide and ozone concentration increases, and this was thought to increase the quantity of OH radical.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2011년도 제40회 동계학술대회 초록집
• /
• pp.204-205
• /
• 2011

In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is a most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. For best performance of thin film silicon solar cell, the dopant profiles at p/i and i/n interfaces need to be as sharp as possible. The sharpness of dopant profiles can easily achieved when using multi-chamber PECVD equipment, in which each layer is deposited in separate chamber. However, in a single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of a single-chamber PECVD system in spite of the advantage of lower initial investment cost for the equipment. In order to resolve the cross-contamination problem in single-chamber PECVD systems, flushing method of the chamber with NH3 gas or water vapor after doped layer deposition process has been used. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. A single-chamber VHF-PECVD system was used for superstrate type p-i-n a-Si:H solar cell manufacturing on Asahi-type U FTO glass. A 80 MHz and 20 watts of pulsed RF power was applied to the parallel plate RF cathode at the frequency of 10 kHz and 80% duty ratio. A mixture gas of Ar, H2 and SiH4 was used for i-layer deposition and the deposition pressure was 0.4 Torr. For p and n layer deposition, B2H6 and PH3 was used as doping gas, respectively. The deposition temperature was $250^{\circ}C$ and the total p-i-n layer thickness was about $3500{\AA}$. In order to remove the deposited B inside of the vacuum chamber during p-layer deposition, a high pulsed RF power of about 80 W was applied right after p-layer deposition without SiH4 gas, which is followed by i-layer and n-layer deposition. Finally, Ag was deposited as top electrode. The best initial solar cell efficiency of 9.5 % for test cell area of 0.2 $cm^2$ could be achieved by applying the in-situ plasma cleaning method. The dependence on RF power and treatment time was investigated along with the SIMS analysis of the p-i interface for boron profiles.

• 한국재료학회지
• /
• 제23권1호
• /
• pp.35-40
• /
• 2013

In this study, the influence on the surface passivation properties of crystalline silicon according to silicon wafer thickness, and the correlation with a-Si:H/c-Si heterojunction solar cell performances were investigated. The wafers passivated by p(n)-doped a-Si:H layers show poor passivation properties because of the doping elements, such as boron(B) and phosphorous(P), which result in a low minority carrier lifetime (MCLT). A decrease in open circuit voltage ($V_{oc}$) was observed when the wafer thickness was thinned from $170{\mu}m$ to $50{\mu}m$. On the other hand, wafers incorporating intrinsic (i) a-Si:H as a passivation layer showed high quality passivation of a-Si:H/c-Si. The implied $V_{oc}$ of the ITO/p a-Si:H/i a-Si:H/n c-Si wafer/i a-Si:H/n a-Si:H/ITO stacked layers was 0.715 V for $50{\mu}m$ c-Si substrate, and 0.704 V for $170{\mu}m$ c-Si. The $V_{oc}$ in the heterojunction solar cells increased with decreases in the substrate thickness. The high quality passivation property on the c-Si led to an increasing of $V_{oc}$ in the thinner wafer. Short circuit current decreased as the substrate became thinner because of the low optical absorption for long wavelength light. In this paper, we show that high quality passivation of c-Si plays a role in heterojunction solar cells and is important in the development of thinner wafer technology.