• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.417-425
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• 2003

H.264, which is the latest video coding standard of both ITU-T(International Telecommunication Union-Telecommunication standardization sector) and MPEG(Moving Picture Experts Group), adopts new video coding tools such as variable block size motion estimation, multiple reference frames, quarter-pel motion estimation/compensation(ME/MC), 4${\times}$4 Integer DCT(Discrete Cosine Transform), and Rate-Distortion Optimization, etc. These new video coding tools provide good coding of efficiency compared with existing video coding standards as H.263, MPEG-4, etc. However, these new coding tools require the increase of encoder complexity. Therefore, in order to apply H.264 to many real applications, fast algorithms are required for H.264 coding tools. In this paper, when encoder MacroBlock(MB) mode is decided by rate-distortion optimization tool, fast mode decision algorithm by skipping variable block size ME/MC and spatial-predictive coding, which occupies most encoder complexity, is proposed. In terms of computational complexity, the proposed method runs about 4 times as far as JM(Joint Model) 42 encoder of H.264, while the PSNR(peak signal-to-noise ratio)s of the decoded images are maintained.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.33-39
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• 2018

An additive noise reduction algorithm for a mass spectrum analyzer is proposed. From the measured ion signal, we first used an estimated threshold from the mode of the measured signal to eliminate background noises with the white Gaussian characteristics. Also, a signal block corresponding to each mass index is constructed to perform a second order curve fitting and a linear approximation to signal block. In this process, the effective signal block composed of only the ion signal can be reconstructed by removing the impulsive noises and the sample signals which are insufficient to be viewed as normal ion signals. By performing curve fitting on the effective signal block, the noise-free mass spectrum can be obtained. To evaluate the performance of the proposed method, a simulation was performed using the signals acquired from the development equipment. Simulation results show the validity of the threshold setting from the mode and the superiority of the proposed curve fitting and linear approximation based noise canceling algorithm.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.1
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• pp.169-174
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• 2005

The conventional harmonic filters to reduce zero harmonic current from neutral reactors and Zig-Zag connection, have several disadvantages of the decreased reduction rate of harmonics under a light load, because they have the load factor-dependent reduction rate of harmonics, and the risk of potential breaking in the neutral line by heated neutral reactor. Based Zig-Zag connection and Open-Delta mode, this new harmonic eliminating device (HANOS) adopts the combination of Zig-Zag connection and Open-Delta mode-the latter is additionally applied to the transformer's core block for connection to the neutral line. The results of this study demonstrated that the new device could eliminate safely zero harmonic current running in the neutral line without heating.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.6
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• pp.1237-1246
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• 2021

This paper is about Asynchronous Transfer Mode (ATM) cell security in which an Output Feedback (OFB) mode is applied to an AES block ciphers. ATM cells are divided into user data cells and maintenance cells, and each cell is 53 octets in size and consists of a header of 5 octets and a payload of 48 octets. In order to encrypt/decrypt ATM cells, the boundaries of cells must be detected, which is possible using the Header Error Control (HEC) field in the header. After detecting the boundary of the cell, the type of payload is detected using a payload type (PT) code to encrypt only the user cell. In this paper, a security method for ATM cells that satisfies the requirements of ISO 9160 is presented.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.4
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• pp.275-285
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• 2003

The now video coding standard H.264 employs variable block size motion compensation, multiple references, and quarter-pel motion vector accuracy. These techniques are key features to accomplish higher coding gain, however, at the same time main factors that increase overall computational complexity. Therefore, in order to apply H.264 to many applications, key techniques are requested to improve their speed. For this reason, we propose a fast motion estimation which is suited for variable block size motion communication. In addition, we propose a fast mode decision method to choose the best mode at early stage. Experimental results show the reduction of the number of SAT SATD calculations by a factor of 4.5 and 2.6 times respectively, when we compare the proposed fast motion estimation and the conventional MVFAS $T^{［8-10］}$. Besides, the number of RDcost computations is reduced by about 45%. Therefore, the proposed methods reduces significantly its computational complexity without noticeable coding loss.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.7C
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• pp.706-715
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• 2005

In this paper, we present a transcoding algorithm for converting an MPEG-2 video bitstream to an H.264 bitstream. The proposed transcoder consists of two parts. One is MPEG2 decoding part and the other is H.264 encoding part Because our algorithm is for transcoding in the spatial domain, MPEG2 decoding part carries out full decoding of MPEG2 bitstream. While, because macroblock type and coded block pattern in MPEG2 are significantly related to macroblock mode in H.264, macroblock mode is selected adaptively according to macroblock type and coded block pattern in H.264 decoding part. Furthermore, motion vector is also used as side-information for 16$\ctimes$16 macroblock mode. Simulation results show that the proposed transcoder yields high reduction of total transcoding time at comparable PSNR.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2031-2038
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• 2008

A small-area and high-speed authentication/security processor (WUSB_Sec) IP is designed, which performs the 4-way handshake protocol for authentication between host and device, and data encryption/decryption of wireless USB system. The PRF-256 and PRF-64 are implemented by CCM (Counter mode with CBC-MAC) operation, and the CCM is designed with two AES (Advanced Encryption Standard) encryption coles working concurrently for parallel processing of CBC mode and CTR mode operations. The AES core that is an essential block of the WUSB_Sec processor is designed by applying composite field arithmetic on AF$(((2^2)^2)^2)$. Also, S-Box sharing between SubByte block and key scheduler block reduces the gate count by 10%. The designed WUSB_Sec processor has 25,000 gates and the estimated throughput rate is about 480Mbps at 120MHz clock frequency.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.11
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• pp.5566-5571
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• 2012

Block shear failure is one of limit states, and demands great caution in designing the tension member or connection joint of steel structures. From many studies and design specification, it is shown that the effect of the bolted connection type on the block shear failure was not considered. In order to investigate the effect of the bolted connection type(bearing type connection and slip critical connection) on the mode/strength of the block shear failure, tensile experiment is conducted in this study. Differences about the failure mode according to the design specification, bearing type connection, and slip critical connection are proposed from the analysis of test results. The variation of the block shear failure strength due to the frictional force in the slip critical connection is also investigated.

• Journal of the Society of Naval Architects of Korea
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• v.38 no.2
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• pp.79-86
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• 2001

This study shows an attempt to generate an assembly sequence and its model for a ship block assembly using the graph theory and graph algorithms. To generate the ship block assembly, we propose four levels of the ship block assembly model such as "geometry mode1", "relational model", "sequential mode1", and "hierarchical model". To obtain the relational model, we used surface and surface intersection algorithm. The sequential model that represents a possible assembly sequence is made by using several graph algorithms from the relational model. The hierarchical model will be constructed from the sequential model in order to represent the block assembly tree and so forth. The purpose of the hierarchical model is to define an assembly tree and to generate the Bill Of Material(BOM). Lastly, the validity of the method proposed in this study is examined with application to ship block assembly models of a single type and double type according to four models mentioned above.