• Journal of Broadcast Engineering
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• v.18 no.3
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• pp.342-348
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• 2013

In this paper, a novel frame rate up conversion (FRUC) algorithm using adaptive extended bilateral motion estimation (AEBME) is proposed. Conventionally, extended bilateral motion estimation (EBME) conducts dual motion estimation (ME) processes on the same region, therefore involves high complexity. However, in this proposed scheme, a novel block type matching procedure is suggested to accelerate the ME procedure. We calculate the edge information using sobel mask, and the calculated edge information is used in block type matching procedure. Based on the block type matching, decision will be made whether to use EBME. Motion vector smoothing (MVS) is adopted to detect outliers and correct outliers in the motion vector field. Finally, overlapped block motion compensation (OBMC) and motion compensated frame interpolation (MCFI) are adopted to interpolate the intermediate frame in which OBMC is employed adaptively based on frame motion activity. Experimental results show that this proposed algorithm has outstanding performance and fast computation comparing with EBME.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.3
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• pp.198-204
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• 2001

In this paper, a 3V 8-bit 200MSPS CMOS folding / interpolation A/D Converter is proposed. It employs an efficient architecture whose FR(Folding Rate) is 8, NFB(Number of Folding Block) is 4, and IR (Interpolating Rate) is 8. For the purpose of improved SNDR by to be low input frequency, distributed track and hold circuits are included. In order to obtain a high speed and low power operation, further, a novel dynamic latch and digital encoder based on a novel delay error correction are proposed. The chip has been fabricated with a 0.35${\mu}{\textrm}{m}$ 2-poly 3-metal n-well CMOS technology. The effective chip area is 1070${\mu}{\textrm}{m}$$\times$650${\mu}{\textrm}{m}$ and it dissipates about 230mW at 3.3V power supply. The INL is within $\pm$1LSB and DNL is within $\pm$1LSB, respectively. The SNDR is about 43㏈, when the input frequency is 10MHz at 200MHz clock frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.3
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• pp.44-44
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• 2001

본 논문에서는 CMOS로 구현된 3.3V 8-bit 200MSPS의 Folding / Interpolation 구조의 A/D 변환기를 제안한다. 회로에 사용된 구조는 FR(Folding Rate)이 8, NFB(Number of Folding Block)가 4, Interpolation rate 이 8이며, 분산 Track and Hold 구조를 회로를 사용하여 Sampling시 입력주파수를 Hold하여 높은 SNDR을 얻을 수 있었다. 고속동작과 저 전력 기능을 위하여 향상된 래치와 디지털 Encoder를 제안하였고 지연시간 보정을 위한 회로도 제안하였다. 제안된 ADC는 0.35㎛, 2-Poly, 3-Metal, n-well CMOS 공정을 사용하여 제작되었으며, 유효 칩 면적은 1070㎛×650㎛ 이고, 3.3V전압에서 230mW의 전력소모를 나타내었다. 입력 주파수 10MHz, 샘플링 주파수 200MHz에서의 INL과 DNL은 ±1LSB 이내로 측정되었으며, SNDR은 43㏈로 측정되었다.

• Journal of the Korean Society for Precision Engineering
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• v.14 no.11
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• pp.77-83
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• 1997

This work is concerned with the algorithm of generating a new circular are interpolation. This research presents a new biarc curve fitting that is a circular interpolation method based on a triarc curve fitting. The triarc method, where a segment span is composed of three circular arcs, using maximum error estimation has the advantage of generating arc splines easily to a given tolerance. The new biarc method is called when the adjacent radii are the same in the same in the triarc method. In generating the machining data for various cam curves in CNC machining with the biarc method and the new biarc method, the latter accomp- lished faster NC-code generation, shorter NC-code block formation and machined the same cam profile more efficiently.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.7
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• pp.734-740
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• 2017

A frame rate up-conversion scheme is needed when moving pictures with a low frame rate is played on appliances with a high frame rate. Frame rate up-conversion methods interpolate the frame with two consecutive frames of the original source. This can be divided into the frame repetition method and motion estimation-based the frame interpolation one. Frame repetition has very low complexity, but it can yield jerky artifacts. The interpolation method based on a motion estimation and compensation can be divided into pixel or block interpolation methods. In the case of pixel interpolation, the interpolated frame was classified into four areas, which were interpolated using different methods. The block interpolation method has relatively low complexity, but it can yield blocking artifacts. The proposed method is the frame rate up-conversion method based on a block motion estimation and compensation using the linearity of motion. This method uses two previous frames and one next frame for motion estimation and compensation. The simulation results show that the proposed algorithm effectively enhances the objective quality, particularly in a high resolution image. In addition, the proposed method has similar or higher subjective quality than other conventional approaches.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.469-472
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• 2005

In this paper, we propose a new deinterlacing algorithm based on motion estimation and compensation with variable block size. Motion compensated methods using a fixed block size tend to produce undesirable artifacts when there exist complicated motion and high frequency components. In the proposed algorithm, the initial block size of motion estimation is determined based on the existence of global motion. Then, the block is divided depending on block characteristics. Since motion compensated deinterlacing may not always provide satisfactory results, the proposed method also use an intrafield spatial deinterlacing. Experimental results show that the proposed method provides noticeable improvements compared to motion compensated deinterlacing with a fixed block size.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.787-788
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• 2008

In this paper, we propose a Motion Estimation (ME) based on Frame Difference (FD) for frame interpolation in video sequence with luminance variation. Proposed algorithm uses limited blocks whose motion is predicted by FD for ME. The Block average of current and previous frame for the blocks which has no motion variation is used as interpolated block. In experiments, the proposed algorithm shows better performance than conventional algorithms.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.982-985
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• 2000

This paper presents channel estimation of an asynchronous W-CDMA reverse link using the interpolation and moving average algorithm in frequency-selective Rayleigh fading channel. The proposed algorithm is an interpolated decision-directed (IDD) block-wise moving average (BWMA) algorithm. The IDD-BWMA algorithm performs two- stage processes. The first stage performs data decision to make a virtual pilot channel by using linear interpolation channel estimation scheme. Then, the second stage performs the channel estimation of the “block-wise moving average” type by using a virtual pilot channel obtained in the first stage. By using Monte-Carlo computer simulations, we show that the proposed channel estimator is superior to other estimation schemes such as the WMSA(K=1) and DD-RAKE at higher Doppler frequencies, especially.

• Journal of the Korean Data and Information Science Society
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• v.17 no.4
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• pp.1289-1297
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• 2006

Before other statistical data analysis the preprocessing steps should be performed adequately to have meaningful results. These steps include processes such as baseline correction, normalization, denoising, and multiple alignment. In this paper an algorithm for baseline correction is proposed with using the piecewise cubic Hermite interpolation with block-selected points and local minima after denoising for SELDI or MALDI mass spectrometry data.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.4
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• pp.205-211
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• 2014

This paper reports an efficient algorithm for accurate rolling shutter distortion removal. A hierarchical global motion estimation approach for a group of blocks reduces the level of computation by three orders of magnitude. In addition, the motion of each scanline is determined accurately by averaging two candidates obtained through cubic spline interpolation. The experimental results show that the proposed method produces accurate motion information with significant computation reduction and corrects the rolling shutter distortion effectively.