• 제목/요약/키워드: Binary structure

검색결과 563건 처리시간 0.023초

A Continuation-Ratio Logits Mixed Model for Structured Polytomous Data

  • Choi, Jae-Sung
    • Journal of the Korean Data and Information Science Society
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    • 제17권1호
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    • pp.187-193
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    • 2006
  • This paper shows how to use continuation-ratio logits for the analysis of structured polytomous data. Here, response categories are considered to have a nested binary structure. Thus, conditionally nested binary random variables can be defined in each step. Two types of factors are considered as independent variables affecting response probabilities. For the purpose of analyzing categorical data with binary nested strutures a continuation-ratio mixed model is suggested. Estimation procedure for the unknown parameters in a suggested model is also discussed in detail by an example.

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다치논리를 적용한 D/A 변환기의 설계 (Design of D/A Converter using the Multiple-valued Logic)

  • 이철원;한성일;최영희;성현경;김흥수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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    • pp.2621-2624
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    • 2003
  • In this paper, we designed 12Bit DAC(Digital to Analog Converter) that applied to multiple-valued logic system to Binary system. The proposed D/A Converter structure consists of the Binary to Quaternary Converter(BQC) and Quaternary to Analog Converter(QAC). The BQC converts the two input binary signals to the one Digit Quaternary output signal. The QAC converts the Quaternary input signal to the Analog output signal. The proposed DAC structure can implement voltage mode DAC that high resolution low power consumption with reduced chip area. And also, it has advantage of the easy expansion of resolution and fast settling time.

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비대칭적 성능의 고용량 비휘발성 메모리를 위한 계층적 구조의 이진 탐색 트리 (A Hierarchical Binary-search Tree for the High-Capacity and Asymmetric Performance of NVM)

  • 정민성;이미정;이은지
    • 대한임베디드공학회논문지
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    • 제14권2호
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    • pp.79-86
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    • 2019
  • For decades, in-memory data structures have been designed for DRAM-based main memory that provides symmetric read/write performances and has no limited write endurance. However, such data structures provide sub-optimal performance for NVM as it has different characteristics to DRAM. With this motivation, we rethink a conventional red-black tree in terms of its efficacy under NVM settings. The original red-black tree constantly rebalances sub-trees so as to export fast access time over dataset, but it inevitably increases the write traffic, adversely affecting the performance for NVM with a long write latency and limited endurance. To resolve this problem, we present a variant of the red-black tree called a hierarchical balanced binary search tree. The proposed structure maintains multiple keys in a single node so as to amortize the rebalancing cost. The performance study reveals that the proposed hierarchical binary search tree effectively reduces the write traffic by effectively reaping the high capacity of NVM.

바이너리 외란관측기를 이용한 유도전동기의 위치제어 (The position control of IM using the binary distrubance observer)

  • 한윤석;김영석;김현중;유완식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.2132-2135
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    • 1997
  • A control approch for the robust position control of IM based on the binary disturbance observer is described. The conventional binary observer is used to remove the chattering problem of variable structure system. However the steady state error may be existed, because the conventioal binary observer etimates external disturbance with constant boundary layers. Thus in order to overcome this problem, the improved binary observer is proposed. By employing the proposed observer, the robustness is achived and the continuous control is realized without the chattering problem and the steady state error. The effectiveness of the proposed observer is confirmed by the computer simulation.

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바이너리 제어기를 이용한 유도전동기의 위치제어 (Position Control of Induction Motors using Binary Control)

  • 한윤석;유완식;구정수;김영석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 하계학술대회 논문집 A
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    • pp.507-509
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    • 1996
  • This paper is concerned with a position, control of induction motors using binary control. Due to the robustness and fast response, variable structure control is widely used for motor control field. However, the chattering phenomenon which is a drawback of VSC deteriorates the control performance and damages system components. In this paper, using binary control which has the characteristics of chattering alleviation and robust property solves this problem. The principle of binary control with inertial external loop and the design method of binary position controller are described. Also the control performance of proposed controller is confirmed by experiments.

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이원관측기를 이용한 유도전동기의 속도추정 (Speed Estimation of Induction Motor Using Binary Observer)

  • 김상욱;나재두;김영석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1997년도 전력전자학술대회 논문집
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    • pp.171-176
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    • 1997
  • This paper presents a design method of the continuous inertial binary observer which includes the rotor flux and speed estimations. The sliding observer based on the variable structure theory ensures the robustness of disturbance and is applied for the method to keep an insensitivity for the variations of parameter. Sliding observer, however, has a high-frequency chattering deteriorating the state estimation performance. To reduce the chattering on the sliding surface in sliding observer and improve the estimation performance, binary observer scheme which has main advantages such as the absence of high-frequency chattering and the finite gains is applied in this paper. Computer simulation results show the effectiveness of binary observer proposed here for the induction motor drives.

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이행적 쌍쌍 비교를 도출하기 위한 휴리스틱 방법 (A Heuristic Method to Construct Transitive Bbinary Comparisons)

  • 김세현;김동우
    • 한국경영과학회지
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    • 제14권1호
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    • pp.80-87
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    • 1989
  • Many Traditional Algebraic Analyses of preference and choice for a finite set of alternatives have been based on binary choices. They have assumed that the binary preference information given by a decision maker is transitive. However, there is considerable evidence that many relations that might occur as preference relations cannot be presented as transitive relations. To construct transitive binary comparisons from intransitive ones, we suggest the notion of superior set, which helps us to understand the structure of intransitive binary comparisons. We also provide a heuristic method to construct transitive binary comparisons. And some merits merits of the suggested method over the existing methods are also discussed.

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Real-Time Non-Local Means Image Denoising Algorithm Based on Local Binary Descriptor

  • Yu, Hancheng;Li, Aiting
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제10권2호
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    • pp.825-836
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    • 2016
  • In this paper, a speed-up technique for the non-local means (NLM) image denoising method based on local binary descriptor (LBD) is proposed. In the NLM, most of the computation time is spent on searching for non-local similar patches in the search window. The local binary descriptor which represents the structure of patch as binary strings is employed to speed up the search process in the NLM. The descriptor allows for a fast and accurate preselection of non-local similar patches by bitwise operations. Using this approach, a tradeoff between time-saving and noise removal can be obtained. Simulations exhibit that despite being principally constructed for speed, the proposed algorithm outperforms in terms of denoising quality as well. Furthermore, a parallel implementation on GPU brings NLM-LBD to real-time image denoising.

CMOS Binary Image Sensor Using Double-Tail Comparator with High-Speed and Low-Power Consumption

  • Kwen, Hyeunwoo;Jang, Junyoung;Choi, Pyung;Shin, Jang-Kyoo
    • 센서학회지
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    • 제30권2호
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    • pp.82-87
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    • 2021
  • In this paper, we propose a high-speed, low-power complementary metal-oxide semiconductor (CMOS) binary image sensor featuring a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector based on a double-tail comparator. The GBT photodetector forms a structure in which the floating gate (n+ polysilicon) and body of the PMOSFET are tied, and amplifies the photocurrent generated by incident light. The double-tail comparator compares the output signal of a pixel against a reference voltage and returns a binary signal, and it exhibits improved power consumption and processing speed compared with those of a conventional two-stage comparator. The proposed sensor has the advantages of a high signal processing speed and low power consumption. The proposed CMOS binary image sensor was designed and fabricated using a standard 0.18 ㎛ CMOS process.

적응 적분바이너리 관측기를 이용한 원통형 영구자석 동기전동기의 센서리스 속도제어 (A Sensorless Speed Control of Cylindric;31 Permanent Magnet Synchronous Motor using an Adaptive Integral Binary Observer)

  • 최양광;김영석;한윤석
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제53권3호
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    • pp.152-163
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    • 2004
  • This paper presents a sensorless speed control of cylindrical permanent magnet synchronous motors(PMSM) using an adaptive integral binary observer In view of composition with a main loop regulator and an auxiliary loop regulator, the binary observer has a property of the chattering alleviation in the constant boundary layer. However, the steady state estimation accuracy and robustness are dependent upon the width of the constant boundary. In order to improve the steady state performance of the binary observer, the binary observer is formed by adding extra integral dynamics to the switching hyperplane equation. With the help of integral characteristic, the rotor speed can be finely estimated and utilized for a sensorless speed controller for PMSM. Since the Parameters of the dynamic equations such as machine inertia or a viscosity friction coefficient are lot well known, there are many restrictions in the actual implementation. The proposed adaptive integral binary observer applies an adaptive scheme so that observer may overcome the problem caused by using the dynamic equations and the rotor speed is constructed by using the Lyapunov function. The observer structure and its design method are described. The experimental results of the proposed algorithm are presented to demonstrate the effectiveness of the approach.