• Journal of Korea Multimedia Society
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• v.5 no.2
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• pp.206-214
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• 2002

In this paper, it is designed and verified the baseband system that performs various protocol functions of specification of the Bluetooth system. In order to verify the developed circuits, various baseband functions are tested by using the ModelSim simulator. The developed circuits operate at 4MHz main clock. Test suite includes hap selection function, generation of the sync word, error correction(1/3 rate FEC, 2/3 rate FEC), HEC generation/checking, CRC generation/checking, data whitening/dewhitening and packet trans/reception procedure. etc. As a result of the simulation, it is verified that the developed baseband system conform to the specification of the Bluetooth system.

• Journal of Korea Society of Digital Industry and Information Management
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• v.4 no.4
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• pp.9-19
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• 2008

In this paper, it is studied anti-collision algorithm based on the transmission protocol for RFID baseband system of the lSO/IEC 18000-6 Type-C regulation and designed the baseband part of RFID reader system using FPGA. To compensate this weak point of the slot random aloha algorithm which must have a long time to be dumped before deciding an appropriate slot size according to the number of surrounding tag, we suggested how to apply Bit By Bit algorithm to be able to recognize the tag when the tag is clashing. The design of the baseband part in the RFID reader system is accomplish by use of the ISE9.1i and I made an experiment on it targeting Spartan2. Construction verification is measured each block through Logic Analyzer and I can verify it has no error. I also compared and analyzed the performance between proposed algorithm and past algorithm and verified the improvement of performance.

• 한국ITS학회:학술대회논문집
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• 2008.11a
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• pp.185-188
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• 2008

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2313-2315
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• 2003

This paper presents the development methods which Samsung GPS baseband chip is called S3E4510X. Specification of S3E4510X and design methodology of baseband architecture is presented with a study of their effects. Also GPS core block and software are described in detail. We designed and implemented the test board with RF module for evaluating performance via static test dynamic test and each performance factors using live signal and CPS simulator. Test results show that our development GPS baseband chip have effectively performance for mobile handset Location Based Service (LBS) and its practical use for navigation.

• ETRI Journal
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• v.25 no.1
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• pp.9-18
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• 2003

We mathematically analyze the passband vestigial sideband (VSB) system for the Advanced Television Systems Committee (ATSC) digital television standard and present a baseband-equivalent VSB model. The obtained baseband VSB model is represented by convolution of the transmission signal (before modulation) and the baseband equivalent of the complex VSB channel. Due to the operation of the physical channel as an RF passband and the asymmetrical property of VSB modulation, it is necessary to use a complex model. However, the passband channel may be reduced to an equivalent baseband. We show how to apply standard channel model information such as delay, gain, and phase for multiple signal paths to compute both the channel frequency response with a given carrier frequency and the resulting demodulated impulse response. Simulation results illustrate that the baseband VSB model is equivalent to the passband VSB model.

• ETRI Journal
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• v.31 no.6
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• pp.795-802
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• 2009

This paper presents the design of an advanced terrestrial digital multimedia broadcasting (AT-DMB) baseband receiver SoC. The AT-DMB baseband is incorporated into a hierarchical modulation scheme consisting of high priority (HP) and low priority (LP) stream decoders. The advantages of the hierarchical modulation scheme are backward compatibility and an enhanced data rate. The structure of the HP stream is the same as that of the conventional T-DMB system; therefore, a conventional T-DMB service is possible by decoding multimedia data in an HP stream. An enhanced data rate can be achieved by using both HP and LP streams. In this paper, we also discuss a time deinterleaver that can deinterleave data for a time duration of 384 ms or 768 ms. The interleaving time duration is chosen using the LP symbol mapping scheme. Furthermore, instead of a Viterbi decoder, a turbo decoder is adopted as an inner error correction system to mitigate the performance degradation due to a smaller symbol distance in a hierarchically modulated LP symbol. The AT-DMB baseband receiver SoC is fabricated using 0.13 ${\mu}m$ technology and shows successful operation with a 50 mW power dissipation.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1983.10a
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• pp.32-34
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• 1983

In this paper, an analog optical filter link is evaluated for the transmission of baseband video signals over a single fiber. LED and PIN photo diode are used as the optical source and the detector. Frequency response of the system, DP, DG and SNR are measured.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.186-189
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• 2003

This paper discussed whole concept of bluetooth baseband and studied its detail algorithm. Important blocks, access code, security and clock management, are implemented and verified to hardware and firmware according to Specification ver.1.1. Then implementation results are compared and examined. Finally, this paper suggested the efficient system implementation method. By using test board, it could confirm that suggested implementation communicated smoothly.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.5-8
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• 2001

SSB(Single Sideband) modulation scheme is high bandwidth efficient method in the mobile communication system compared with present DSB(Double Sideband) modulation scheme. Using the othogonality between inphase PN code and Hilbert transformed quadrature PN code, we propose phase estimation structure that enables coherent demodulation in the reverse link basestation receiver Several system characteristics, bit error rate and phase error variance, are simulated and compared with balanced QPSK DS/CDMA system. To verify system performance, SSB/BPSK-DS/CDMA test board is implemented using FPGA chips.

• The Journal of the Acoustical Society of Korea
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• v.1 no.1
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• pp.54-59
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• 1982

We present an improved 4800 bps LPC vocoder system that virtually eleminates the buzzy effect from synthetic speech. Excitation signal in the new system is formed by adding high-pass filtered pitch pulses or random noise to a baseband residual signal that has been coded by pitch predictive PCM. Since the baseband residual is used as a part of excitation, the system is also robust to V/UV and pitch errors. According to our informal listening tests, the synthetic speech of the new system does not have the buzzy effect. As a result the vocoder speech quality is more natural than that of a conventioinal LPC vocoder.