• Proceedings of the KIEE Conference
• /
• 2005.05a
• /
• pp.116-118
• /
• 2005

STSAT-2 is first satellite which is scheduled to launch by first Korea launcher. After launch Ground station Baseband Controller(GBC) for operating STSAT-2 is now developing. GBC control data flow path between satellite operation computers and ground station antennas. and GBC count number of received data packets among demodulated audio signals from three antennas and set data flow path to good-receiving antenna automatically. In GBC two uplink FSK modulators(1.2kbps, 9.6kbps) and six downlink FSK demodulators(9.6kbps, 38.4kbps) are embedded. STSAT-2 GBC hardware is more simpler than STSAT-1 GBC by using FPGA in which all digital logic implemented. Now test and debugging of GBC hardware and Software(FPGA Code and GBC Manager Program) is well progressing in SaTReC, KAIST. This paper introduce GBC structure, functions and test results.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.17 no.1
• /
• pp.56-64
• /
• 2017

In this paper, an advanced ZigBee (AZB) system for internet-of-things (IoT) applications is proposed which can support various data rates from 31.25 Kbps to 2 Mbps, and the implementation results of the AZB baseband processor are presented. Repetition coding for 32-chip direct-sequence spread spectrum (DSSS) symbol is applied for low rates under 250 Kbps to extend the coverage. Convolution coding, puncturing, and interleaving for non-DSSS symbol are performed for high rates from 500 Kbps to 2 Mbps for multi-media services. Simulation results show that the coverage increases at the rate of 51.8-77.3% for various environments compared with IEEE 802.15.4 ZigBee. AZB baseband processor was implemented in 180 nm CMOS process and total gate counts are 260K with the size of $5.8mm^2$.

• Proceedings of the IEEK Conference
• /
• 2002.07b
• /
• pp.1019-1022
• /
• 2002

The current paper proposes a wavelet-based digital watermarking algorithm using statistical characteristic of image and human visual system (HVS). The original image is decomposed into 4-level using a discrete wavelet transform (DWT), then the watermark is embedded into the perceptually significant coefficients (PSCs) of the image. In general, the baseband of a wavelet-decomposed image includes most of the energy of the original image, thereby having a crucial effect on the image quality. As such, to retain invisibility, the proposed algorithm does not utilize the baseband. Plus, the wavelet coefficients on the lowest level are also excluded in the watermark-embedding step, because these coefficients call be easily eliminated and modified by lossy compression and common signal processing. As such, the PSCs are selected from all subbands, except for the baseband and subbands on the lowest level. Finally, using the selected PSCs, the watermark is then embedded based on spatial masking of the wavelet coefficients so as to provide invisibility and robustness. Computer simulation results confirmed that the proposed watermarking algorithm was more invisible and robust than conventional algorithms.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2008.10a
• /
• pp.681-684
• /
• 2008

Bluetooth baseband performs FEC (forward error check) at the interface of transmitter and receiver modem. Well-designed FEC means directly the efficiency of retransmission of the data payload therefore design optimization is very important. In this paper, we designed a optimal 1/3, 2/3 type of FEC. 1/3 FEC. which performs 3 times customary repetition was designed for packet header, and 2/3 FEC was designed for data packets with (15, 10) reduced hamming code. The proposed hardware FEC block was described and verified using Verilog HDL and later to be automatically synthesized. The synthesized FEC block operated at 40Mhz normal clock speed of the target baseband microcontroller.

• Journal of the Institute of Convergence Signal Processing
• /
• v.5 no.4
• /
• pp.325-332
• /
• 2004

In this paper, we propose a new DSSS-QPSK baseband modem receiver structure. A general receiver consists of matched filter, do-spreader, and DLL(Delay Locked Loop). In this paper, the matched filter plays a role of the do-spreader using the structure similarities between the matched filter and the de-spreader. As a result of the new receiver architecture, we can reduce the computational expenses and get the simpler receiver structure. This result can be used as an important part in designing the high speed modem. And, through the computer simulation and the experiment with the proposed architecture, we show that the proposed receiver structure yields fast operation speed and simple overall architecture.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.5 no.1
• /
• pp.24-36
• /
• 2002

It is important to use frequency resource effectively to support much more users, to maximize the DS-CDMA system performance. In this paper, we use MPSK, QAM, MFSK and PR coder as a baseband modulation method for DS-CDMA system. Increasing user's number, we compare the performance of each system using different baseband modulation method, by expecting BER performance. BPSK has generally good performance, in case of low power operation of terminal 8FSK has excellent performance relatively, PR has excellent performance when high power operation of terminal and also good for situation of excessive user's number. QAM is not suitable for DS-CDMA system.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2002.04b
• /
• pp.1285-1288
• /
• 2002

Bluetooth wireless technology is a publicly available specification proposed for Radio Frequency (RF) communication for short-range and point-to- multipoint voice and data transfer. It operates in the 2.4GHz ISM(Industrial, Scientific and Medical) band and offers the potential for low-cost, broadband wireless access for various mobile and portable devices at range of about 10 meters. In this paper, we describe the structure and the test results of the bluetooth baseband module we have developed. This module was developed based on IP reuse. So Interface of each module such as link controller UART, and audio CODEC is designed based on ARM7 comfortable processor. We also considered various interfaces of related external chips. The fully synthesizable baseband module was fabricated in a $0.25{\mu}m$ CMOS technology occupying $2.79{\times}2.8mm^2$ area including the ARM TDMI processor. And a FPGA implementation of this module is tested for file and bit-stream transfers between PCs.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.17 no.3
• /
• pp.685-690
• /
• 2013

This paper has proposed a multi-channel and wide gain-range baseband circuit blocks for the IEEE 802.15.4g MR-OFDM SUN systems. The proposed baseband circuit blocks consist of two negative-feedback VGAs, an active-RC 5th-order chebyshev low-pass-filter, and a DC-offset cancellation circuit. The proposed baseband circuit blocks provide 1 dB cut-off frequencies of 100 kHz, 200 kHz, 400 kHz, and 600 kHz respectively, and achieve a wide gain-range of +7 dB~+84 dB with 1 dB step. In addition, a DC-offset cancellation circuit has been adopted to mitigate DC-offset problems in direct-conversion receiver. Simulation results show a maximum input differential voltage of $1.5V_{pp}$ and noise figure of 42 dB and 37.6 dB at 5 kHz and 500 kHz, respectively. The proposed I-and Q-path baseband circuits have been implemented in $0.18-{\mu}m$ CMOS technology and consume 17 mW from a 1.8 V supply voltage.

• Proceedings of the Korean Institute of Communication Sciences Conference
• /
• 2004.07a
• /
• pp.325-325
• /
• 2004

• 전기의세계
• /
• v.35 no.3
• /
• pp.196-204
• /
• 1986

본고의 내용은 다음과 같다. 1. 유형 2. 구조 3. 토폴로지 4. 매체 5. Baseband와 Broadband 6. MAC프로토콜 7. 기타쟁점 8. 현황 및 결론