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검색결과 54건 처리시간 0.025초

Design and Implementation of a Duplex Digital Excitation Control System for Power Plants

  • Nam. Chae-Ho;Nam, Jung-Han;Choi, June-Hyug;Baeg, Seung-Yeob;Cho, Chang-Ho
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.140.4-140
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    • 2001
  • This paper presents the duplex controller operated as master slave for Self Excited Static Type excitation system and the results of operation for duplex digital excitation system. Software is made up duplex multi-tasking control algorithm which is based on VxWorks(real-time OS), preprocessing algorithm for input-output signal, BSP & Device Driver for interfacing hardware and software, and OIS(Operator Interface Station) program, HMI S/W. Master controller and slave controller intercommunicate dominant data to minimize bump when controller switchover from master to slave occurs. Communication between master controller and slave controller is duplicated and communication between OIS and controller is duplicated. Hardware is made up VMEBUS based controller which is designed with PPC & I/O board ...

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A Wafer Level Packaged Limiting Amplifier for 10Gbps Optical Transmission System

  • Ju, Chul-Won;Min, Byoung-Gue;Kim, Seong-Il;Lee, Kyung-Ho;Lee, Jong-Min;Kang, Young-Il
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.189-195
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    • 2004
  • A 10 Gb/s limiting amplifier IC with the emitter area of $1.5{\times}10{\mu}m^2$ for optical transmission system was designed and fabricated with a AIGaAs/GaAs HBTs technology. In this stud)', we evaluated fine pitch bump using WL-CSP (Wafer Level-Chip Scale Packaging) instead of conventional wire bonding for interconnection. For this we developed WL-CSP process and formed fine pitch solder bump with the $40{\mu}m$ diameter and $100{\mu}m$ pitch on bonding pad. To study the effect of WL-CSP, electrical performance was measured and analyzed in wafer and package module using WL-CSP. In a package module, clear and wide eye diagram openings were observed and the riselfall times were about 100ps, and the output" oltage swing was limited to $600mV_{p-p}$ with input voltage ranging from 50 to 500m V. The Small signal gains in wafer and package module were 15.56dB and 14.99dB respectively. It was found that the difference of small signal gain in wafer and package module was less then 0.57dB up to 10GHz and the characteristics of return loss was improved by 5dB in package module. This is due to the short interconnection length by WL-CSP. So, WL-CSP process can be used for millimeter wave GaAs MMIC with the fine pitch pad.

Flip Chip Assembly Using Anisotropic Conductive Adhesives with Enhanced Thermal Conductivity

  • Yim, Myung-Jin;Kim, Hyoung-Joon;Paik, Kyung-Wook
    • 마이크로전자및패키징학회지
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    • 제12권1호
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    • pp.9-16
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    • 2005
  • This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

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The Effects of UBM and SnAgCu Solder on Drop Impact Reliability of Wafer Level Package

  • Kim, Hyun-Ho;Kim, Do-Hyung;Kim, Jong-Bin;Kim, Hee-Jin;Ahn, Jae-Ung;Kang, In-Soo;Lee, Jun-Kyu;Ahn, Hyo-Sok;Kim, Sung-Dong
    • 마이크로전자및패키징학회지
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    • 제17권3호
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    • pp.65-69
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    • 2010
  • In this study, we investigated the effects of UBM(Under Bump Metallization) and solder composition on the drop impact reliability of wafer level packaging. Fan-in type WLP chips were prepared with different solder ball composition (Sn3.0Ag0.5Cu, and Sn1.0Ag0.5Cu) and UBM (Cu 10 ${\mu}m$, Cu 5 ${\mu}m$\Ni 3 ${\mu}m$). Drop test was performed up to 200 cycles with 1500G acceleration according to JESD22-B111. Cu\Ni UBM showed better drop performance than Cu UBM, which could be attributed to suppression of IMC formation by Ni diffusion barrier. SAC105 was slightly better than SAC305 in terms of MTTF. Drop failure occurred at board side for Cu UBM and chip side for Cu\Ni UBM, independent of solder composition. Corner and center chip position on the board were found to have the shortest drop lifetime due to stress waves generated from impact.

Improving the Rendering Speed of 3D Model Animation on Smart Phones

  • Ng, Cong Jie;Hwang, Gi-Hyun;Kang, Dae-Ki
    • Journal of information and communication convergence engineering
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    • 제9권3호
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    • pp.266-270
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    • 2011
  • The advancement of technology enables smart phones or handheld devices to render complex 3D graphics. However, the processing power and memory of smart phones remain very limited to render high polygon and details 3D models especially on games which requires animation, physic engine, or augmented reality. In this paper, several techniques will be introduced to speed up the computation and reducing the number of vertices of the 3D meshes without losing much detail.

First report of splenic myelolipoma in a Schnauzer in Colombia: a case report

  • Valentina Rueda-Garcia;Nicolas Carrillo-Godoy;Carlos Alberto Bonilla-Gutierrez;Alejandra Valdivieso-Valencia;Iang Schroniltgen Rondon-Barragan
    • 대한수의학회지
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    • 제62권4호
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    • pp.28.1-28.4
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    • 2022
  • Splenic myelolipoma is a rare tumor in dogs with an unclear origin. A male 13-year-old Schnauzer dog was presented because of a bump on the left side of the abdomen. Clinical examination and abdominal ultrasound revealed a mass in the spleen. A total splenectomy was carried out, and histopathology revealed a splenic myelolipoma. Before surgery, the patient showed high serum alanine aminotransferase levels, which returned to normal eight months after the resection. Unfortunately, the postoperative follow-up showed increased serum cholesterol and triglyceride levels, suggesting liver compromise. This is the first report of a splenic myelolipoma in Colombia.

High frequency measurement and characterization of ACF flip chip interconnects

  • 권운성;임명진;백경욱
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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    • pp.146-150
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    • 2001
  • Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. S-parameters of on-chip and substrate were separately measured in the frequency range of 200 MHz to 20 GHz using a microwave network analyzer HP8510 and cascade probe. And the cascade transmission matrix conversion was performed. The same measurements and conversion techniques were conducted on the assembled test chip and substrate at the same frequency range. Then impedance values in ACF flip-chip interconnection were extracted from cascade transmission matrix. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of SiO$_2$filler to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. High frequency behavior of metal Au stud bumps was investigated. The resonance frequency of the metal stud bump interconnects is higher than that of ACF flip-chip interconnects and is not observed at the microwave frequency band. The extracted model parameters of adhesive flip chip interconnects were analyzed with the considerations of the characteristics of material and the design guideline of ACA flip chip for high frequency applications was provided.

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도로터널의 방재설계 -사례중심으로- (Recommendations of Safety Design in Road Tunnels - Based on up-to dated experiences -)

  • 박정주
    • 터널과지하공간
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    • 제17권5호
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    • pp.337-349
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    • 2007
  • 터널은 매년 그 연장이 길어지고 차선수도 증가하여 초 장대, 대 단면의 도로터널이 급격히 증가하는 추세다. 이런 추세에 따라 터널의 안전에 관련한 설계 시공 운영에 대한 철저한 대비가 어느 때보다 요구되는 실정이다. 도로터널 내 자동차와 자동차의 추돌과 충돌, 운전 부주의로 인접한 고형 구조물과 충돌, 자동차의 결함으로 인한 자체적인 발화 등으로 대형사고가 발생하여 인명과 재산에 미치는 영향이 크게 될 가능성이 높다. 따라서 이런 사고를 방지하기 위하여는 현재까지의 경험과 외국의 사례를 기초로 터널 내 비상시설과 방재시설을 초 장대터널의 길이와 규모에 적합한 기술적, 관리적 문제를 상정하고 그 내용을 설계에 반영하도록 하여야 할 것이다. 본 기사에서는 이와 관련된 내용을 점검하고 개선 방향을 제시하고자 한다.

Stereoscope를 이용한 미세종자류 한약재 외부형태 감별연구(제2보(報)) -구자(韭子)와 총자(蔥子), 동규자(冬葵子)와 경마자(苘麻子), 차전자(車前子)와 형개자(荊芥子)- (Identification of Morphological Appearance of Minute Seed Herbs Using Stereoscope (Report II) - Alli Tuberosi Semen✳Alli Fistulosi Semen, Malvae Semen✳Abutili Semen, Plantaginis Semen✳Schizonepetae Semen)

  • 김영식;주영승
    • 대한본초학회지
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    • 제31권4호
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    • pp.61-69
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    • 2016
  • Objectives : This study is to propose discriminative keys with stereoscope for minute seed herbs easily mixed up, but hard to discriminate by naked eyes: Alli Tuberosi Semen(ATS)✳Alli Fistulosi Semen(AFS), Malvae Semen(MS)✳ Abutili Semen(AS), Plantaginis Semen(PS)✳Schizonepetae Semen(SS).Objectives : We reviewed the description of original plants and medicinal herbs from literature. The specimen of original plant were collected, determinated and compared to samples in the market. Primary classification was performed with naked eyes. and we found out other discrimination keys for non-distinctive herbs with stereoscope. Discrimination keys were set as the morphological criteria of authentic herbs, percentage of adulteration, and standards for discriminating genuine herbs from adulteration.Results : 1) ATS is bigger, has reticulate pattern on protuberant side and unique garlic chives taste. AFS which is usually mixed up, is smaller, has 1~2 ridges and unique welsh onion taste. 2) MS is smaller, has no villus, but its length of bumps are similar. AS easily mixed up, is bigger and has white villus. Its upper side bump is longer and more sharp. 3) PS has dent at middle of the back side. It becomes very sticky when it is put or boiled in water. SS which can be mixed up has no dent and low viscosity compared to PS.Conclusions : With this result, we propose discriminative keys which can identify the original plants and processed herbal state of six herbs. Because minute medicinal herbs are hardly distinguishable by sensory test, It is essential to differentiate by using stereoscope.

Effect of Shield Line on Noise Margin and Refresh Time of Planar DRAM Cell for Embedded Application

  • Lee, Jung-Hwan;Jeon, Seong-Do;Chang, Sung-Keun
    • ETRI Journal
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    • 제26권6호
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    • pp.583-588
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    • 2004
  • In this paper we investigate the effect of a shield metal line inserted between adjacent bit lines on the refresh time and noise margin in a planar DRAM cell. The DRAM cell consists of an access transistor, which is biased to 2.5V during operation, and an NMOS capacitor having the capacitance of 10fF per unit cell and a cell size of $3.63{\mu}m^2$. We designed a 1Mb DRAM with an open bit-line structure. It appears that the refresh time is increased from 4.5 ms to 12 ms when the shield metal line is inserted. Also, it appears that no failure occurs when $V_{cc}$ is increased from 2.2 V to 3 V during a bump up test, while it fails at 2.8 V without a shield metal line. Raphael simulation reveals that the coupling noise between adjacent bit lines is reduced to 1/24 when a shield metal line is inserted, while total capacitance per bit line is increased only by 10%.

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