• 제목/요약/키워드: BMFET

검색결과 3건 처리시간 0.014초

높은 전류 이득률을 갖는 SOI 수평형 혼성 BMFET (A SOI Lateral Hybrid BMFET with High Current Gain)

  • 김두영;전정훈;김성동;한민구;최연익
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제49권2호
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    • pp.116-119
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    • 2000
  • A hybrid SOI bipolar-mode field effect transistor (BMFET) is proposed to improve the current gain. The device characteristics are analyzed and verified numerically for BMFET mode, DMOS mode, and hybrid mode by MEDICI simulation. The proposed SOI BMFET exhibits 30 times larger current gain in hybrid-mode operation by connecting DMOS gate to the p+ gate of BMFET structure as compared with the conventional structure without sacrifice of breakdown voltage and leakage current characteristics. This is due to the DMOS-gate-induced hybrid effect that lowers the barrier of p-body and reduces the charge in p-body.

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SOI BMFET 의 고온 특성 분석 (High Temperature Characteristics of SOI BMFET)

  • 임무섭;김성동;한민구;최연익
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 하계학술대회 논문집 C
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    • pp.1579-1581
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    • 1996
  • The high temperature characteristics of SOI BMFET are analyzed by the numerical simulation and compared with MOS-gated SOI power devices at high temperatures. The proposed SOI BMFET combines bipolar operation in the on-state with unipolar FET operation in the off-state, so that it may be suitable for high temperature operation without any significant degradation of performance such as the leakage current and blocking capability. The simulation results show that SOI BMFET with a higher doped n-resurf layer is the most promising device far high temperature application as compared with MOS-gated SOI power devices, exhibiting the low on-state voltage drop as well as the excellent forward blocking capability at high temperature.

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SOI 트렌치-모스 바이폴라-모드 전계효과 트랜지스터 구조의 설계 및 수치해석 (Design and Numerical Analyses of SOI Trench-MOS Bipolar-Mode Field Effect Transistor)

  • 김두영;오재근;한민구;최연익
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제49권5호
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    • pp.270-277
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    • 2000
  • A new Lateral Trench-MOS Bipolar-Mode Field-Effect Transistor(LTMBMFET) is proposed and verified by MEDICI simulation. By using a trench MOS structure, the proposed device can enhance the current gain without sacrificing other device characteristics such as the breakdown voltage. The channel region of the proposed device is formed between the trench MOS structure. So the effect of the substrate voltage is negligible when compared with the conventional device which has a channel region between the gate junction and the buried oxide layer.

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