• 한국전자통신학회논문지
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• 제12권1호
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• pp.123-128
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• 2017

본 논문에서는 카메라 및 기타 센서 처리를 통한 소형차의 자율 주행을 통한 미션 수행에 대해 다루도록 한다. 주어진 차선내에서 안전한 운행을 위해서는 차선내에서의 차량의 자세 정보 추출이 필요하다. 이를 위해 호모그라피를 이용하도록 한다. 주어진 영상을 흑백 이미지로 변환후 이치화와 에지를 이용하여 차선에서 필요한 제어점들을 추출한다. 호모그라피를 이용하여 두 개의 제어점들을 세계 좌표계로 변환후 차량의 각도와 위치를 계산하도록 한다. 칼라 정보를 이용하여 신호등 판단을 하도록 한다. 실험을 통해 주어진 임무를 잘 수행함을 확인할 수 있었다.

• 제어로봇시스템학회논문지
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• 제12권7호
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• pp.693-699
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• 2006

An accurate and compact map is essential to an autonomous mobile robot system. For navigation, it is efficient to use an occupancy grid map because the environment is represented by probability distribution. But it is difficult to apply it to the large environment since it needs a large amount of memory proportional to the environment size. As an alternative, a topological map can be used to represent it in terms of the discrete nodes with edges connecting them. It is usually constructed by the Voronoi-like graphs, but in this paper the topological map is incrementally built based on the local grid map using the thinning algorithm. This algorithm can extract only meaningful topological information by using the C-obstacle concept in real-time and is robust to the environment change, because its underlying local grid map is constructed based on the Bayesian update formula. In this paper, the position probability is defined to evaluate the quantitative reliability of the end nodes of this thinning-based topological map (TTM). The global TTM can be constructed by merging each local TTM by matching the reliable end nodes determined by the position probability. It is shown that the proposed TTM can represent the environment accurately in real-time and it is readily extended to the global TTM.

• 로봇학회논문지
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• 제11권2호
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• pp.51-59
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• 2016

In this paper we present (1) analysis of imaging sonar measurement for two-view relative pose estimation of an autonomous vehicle and (2) bundle adjustment and 3D reconstruction method using imaging sonar. Sonar has been a popular sensor for underwater application due to its robustness to water turbidity and visibility in water medium. While vision based motion estimation has been applied to many ground vehicles for motion estimation and 3D reconstruction, imaging sonar addresses challenges in relative sensor frame motion. We focus on the fact that the sonar measurement inherently poses ambiguity in its measurement. This paper illustrates the source of the ambiguity in sonar measurements and summarizes assumptions for sonar based robot navigation. For validation, we synthetically generated underwater seafloor with varying complexity to analyze the error in the motion estimation.

• 정보처리학회논문지B
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• 제14B권3호
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• pp.163-170
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• 2007

이동차량 혹은 이동로봇의 자율 주행에 있어서 주변 환경의 인식을 통하여 산출되는 자기위치확인은 가장 핵심적인 요소이다. 일반적으로 GPS나 INS를 통합하여 이동차량 혹은 이동로봇에 장착된 카메라의 위치와 방향을 얻을 수 있지만, 이 경우 정확한 자기위치인식을 위해서는 충분한 지상 기준점을 이용해야만 한다. 본 연구에서는 기존의 호모그래피 방법이 2차원 특징점의 상관관계를 이용하는 것과는 다르게 GPS와 INS 입력값을 이용하여 이전 시점 영상과 중첩된 3차원 모델로부터 얻어진 3차원 좌표를 투영 변환함으로써 예측한 위치와 현재 시점 영상으로부터 KLT 추적방법을 사용하여 산출된 대응 특징점의 위치 사이의 관계로부터 카메라의 위치와 방향을 산출하는 방법을 제안한다. 제안하는 방법의 성능을 평가하기 위해 무선으로 운행되는 간이실험장치 내에 CCD카메라, GPS, INS 등을 장착하였으며, 영상은 15Hz의 프레임율로 획득한 비디오시퀀스를 사용하여 실시간으로 카메라 위치와 방향을 산출하는 실험을 수행하였다.

• 전자공학회논문지S
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• 제36S권12호
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• pp.10-19
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• 1999

셀룰라 오토마타 신경망(CANS)은 생물학적 발생과 진화에 기반한 신경망 모델이다. CANS에서 각 뉴런은 상호간에 국소적인 연결을 갖고 있으며 카오스 뉴런 모델의 동작 방정식에 따라 펄스의 형태로 동작한다. 신경망은 초기 패턴을 셀룰라 오토마타(CA) 규칙에 따라 발생시켜 얻어진다. 기존의 연구에서는 유용한 기능을 얻기 위하여 초기패턴을 진화시켰다. 그러나 이 방법은 신경망의 표현공간을 모두 나타낼 수 없다. 따라서 본 논문에서는 신경망의 표현공간이 작아지는 문제점을 개선하기 위한 CA의 발생규칙을 진화시키는 방법을 제안한다. DNA 코딩은 코딩의 중복과 여분을 효과적으로 사용하며 규칙의 표현에 매우 적합하다. 본 논문에서는 CA 규칙의 일반적인 표현방법을 제시하고 DNA 코드를 CA 규칙으로 해석하는 방법을 제안한다. 제안된 방법은 자율이동로봇의 제어기에 사용하여 주행 문제에 적용함으로써 그 유효성을 확인하였다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}