• Journal of Korea Multimedia Society
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• v.10 no.10
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• pp.1260-1270
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• 2007

Testing and diagnosis of analog circuits(or mixed-signal circuits) continue to be a hard task for test engineers and efficient test methodologies to solve these problems are needed. This paper proposes a novel analog circuits test technique using time slot specification (TSS) based built-in current sensors (BICS). A technique for location of a fault site and separation of fault type based on TSS is also presented. The proposed built-in current sensors and TSS technique has high testability, fault coverage and a capability to diagnose catastrophic faults and parametric faults in analog circuits. In order to reduce time complexity of test point insertion procedure, external output and power nodes are used for test points and the current sensors are implemented in the automatic test equipment(ATE). The digital output of BICS can be easily combined with built-in digital test modules for analog IC test.

• Journal of Drive and Control
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• v.18 no.2
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• pp.46-55
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• 2021

A forklift is a powered industrial vehicle used to lift and move materials over short distances. Nowadays, almost all forklifts are equipped with an automatic transmission due to its improved operator comfort and increased productivity. Thanks to marked improvement of transmission control unit equipped with highly-advanced microcontrollers, recently developed automatic transmission for forklift have various auxiliary functions such as creep, auto retardation, and automatic shift with excellent shift quality. This paper deals with the creep function which enables one to maneuver a forklift at the designated low speed by slip control of clutches. The design of creep function was based on four modes of creep operation depending on the status of the operator's shift lever and accelerator pedal. Control algorithms and control parameters for each mode were designed to achieve the desired static and dynamic performance. Vehicle test for the designed creep function was carried out with an independently developed embedded controller. Test results confirmed good creep speed control without speed error at a steady state with a mild shift shock during mode changes by stepping or releasing the accelerator.

• Journal of the Korean Society for Precision Engineering
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• v.23 no.2 s.179
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• pp.199-206
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• 2006

Automatic grease lubricator is equipment that provides adequate amount of fresh grease constantly to the shaft and the bearings of machines. It minimizes the friction heat and reduces the friction loss of machines to the least. This research is to develop automatic grease lubricator by gear driven mechanism with controlled operation time. The ultimate design of this equipment is to lubricate an adequate amount of grease by a simple switch clicking according to the advanced set cycle. The backlash of the gear was minimized to increase the output power. To increase the power of gear mechanism, the binding frequency and the thickness of the coil were changed. To control the rotating cycles of the main shaft according to its set numbers, different resistance and chips were used to design the circuit to controls electrical signals with pulse. The body of the lubricator was analyzed by stress analysis with different constructed angle. The stress analysis for differing loading pressures applied to the exterior body of grease lubricator due to the setup angle, was found that the maximum stress was distributed over the outlet part where the grease lubricator suddenly narrowed contracts. Digital mock-up was analyzed and the rapid prototyping(RP) trial products were tested with PCB circuit and grease. The evaluation of the outlet capacity for RP trial products was conducted, because the friction caused by the outlet on the wall surface was an important factor in the operation of the equipment. Finally, the finishing process was applied to decrease the roughness of the surface to a comparable level and was able to test the performance examination for the product.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.1
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• pp.61-70
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• 2016

This paper describes a new PMU(parametric measurement unit) design technique for automatic test equipment(ATE). Only one DDA(differential difference amplifier) is used to force the test signals to DUT(device under test), while conventional design uses two or more amplifiers to force test signals. Since the proposed technique does not need extra amplifiers in feedback path, the proposed PMU inherently guarantees stable operation. Moreover, to measure the response signals from DUT, proposed technique also adopted only one DDA amplifier as an IA(instrument amplifier), while conventional IA uses 3 amplifiers and several resistors. The DDA adopted two rail-to-rail differential input stages to handle full-range differential signals. Gain enhancement technique is used in folded-cascode type DDA to get open loop gain of 100 dB. Proposed PMU design enables accurate and stable operation with smaller hardware and lower power consumption. This PMU is implemented with 0.18 um CMOS process and supply voltage is 1.8 V. Input ranges for each force mode are 0.25~1.55 V at voltage force and 0.9~0.935 V at current force mode.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1451-1453
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• 2000

The automatic/driverless operation which are great important techniques in metro railway are required to increase higher safety, greater reliability, and transport capacity. To satisfy such demands, we must have the system design and testing technique for the railway system operation. These techniques are related to the onboard train control and communication systems which include TCMS(Train Control and Monitoring System), ATO(Automatic train Operation), ATC(Automatic train Control), and TWC(Train to wayside communication). These sub-systems must be interfacing with not only each others but also the signal system on the ground. We tested the train control system on the 7 line that has been developed on the basis of the standardized type EMU for korea railway systems.

• Journal of The Korea Institute of Healthcare Architecture
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• v.26 no.1
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• pp.73-84
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• 2020

Purpose: Though Korean healthcare services have been upgraded, infection and fire had been broken out in general hospitals. And higher concerns about quality assessment made it to clinical laboratory design guideline studies. So, this study investigates the facilities, equipment and personnel of laboratory medicine focusing on more than five hundred fifty bed hospital, and contributes to make guidelines for safety and efficiency in lab. Methods: Questionnaires to supervisor technologist and field surveys to medical laboratories in korean hospitals have been conducted for the data collection. 16 answers have been analysed statistically by MS Excel program. Results: Most of the sample tests such as hematology, clinical chemistry, immunology, transfusion, urinalysis, microbiology and molecular diagnosis are performed by more than 80% in large sized general hospital laboratory. In the test methods, automatic analyzers are used up to 80%, total laboratory automation up to 43% in clinical chemistry and immunology, and manual tests in all sorts of the test. There are placed in single lab or two and three labs above the ground, which are all in semi-open lab. There is some correlation with the number of specimens and the number of lab people depending on the number of hospital beds. Laboratory environment shows that work distance is good, but evacuation path width, visibility, separation of staff area from automatic analyzer, and equipment installations are needed to have more spaces and gears. Most of the infection controls are equipped with mechanical ventilation, air-conditioning, washbasin and wastewater separation, BSC installation and negative pressure lab room. Implications: Although the laboratory space area is calculated considering the number of hospital beds, type of tests and number of staff, hospital's expertise and the samples numbers per year should be taken into account in the planning of the hospital.

• ETRI Journal
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• v.35 no.3
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• pp.439-447
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• 2013

To increase device memory yield, many manufacturers use incorporated redundancy to replace faulty cells. In this redundancy technology, the implementation of an effective redundancy analysis (RA) algorithm is essential. Various RA algorithms have been developed to repair faults in memory. However, nearly all of these RA algorithms have low analysis speeds. The more densely compacted the memory is, the more testing and repair time is needed. Even if the analysis speed is very high, the RA algorithm would be useless if it did not have a normalized repair rate of 100%. In addition, when the number of added spares is increased in the memory, then the memory space that must be searched with the RA algorithms can exceed the memory space within the automatic test equipment. A very efficient RA algorithm using simple calculations is proposed in this work so as to minimize both the repair time and memory consumption. In addition, the proposed algorithm generates an optimal solution using a tree-based algorithm in each fault group. Our experiment results show that the proposed RA algorithm is very efficient in terms of speed and repair.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.18 no.5
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• pp.483-490
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• 2009

The objective of this development project is to localize an automatic molten metal supplier that has been distributed by WESTOMAT, Germany, throughout the world. To achieve this purpose, an energy-saving pressurized dosing furnace and molten metal differential pressure control system that Is able to automatically supply a determined quantity of aluminum molten metal were developed. The localized equipment was installed in a site. Also, the results of the test operation of this equipment can be summarized as follows: It was able to improve the productivity because there were small decreases in supplying speeds and small losses in wastes compared to the existing mechanical molten metal supplier. Also, it was able to minimize the cost in maintenances due to the direct application of high temperature molten metals to molds. In addition, there were small energy losses due to the use of high thermal insulators compared to the existing reverberating furnace and able to prolong the life-time of furnaces and produce good quality nonferrous metals because it represented small carbon refractories and alumina in applied molten metals. Furthermore, it demonstrated no particular differences by objectively comparing it with the product by WESTOMAT.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.5
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• pp.51-56
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• 2020

Measurement accuracy and required time is important to make ATE(Automatic test equipment) system in Ka band, and SCPI commands of power meter which is a representative RF test equipment are studied in this paper. Comparison data between FETCH and MEASURE which are SCPI commands are measured in 30 G ~ 31 GHz and -70 ~ +20 dBm using two power sensor. The data show that FETCH which is the fastest SCPI is able to get reliable data in linear interval above noise level. MEASURE which is the best accurate command takes longer time than FETCH, and the longest time is 13.2 seconds. These results offer that measurement accuracy and required time of the two SCPI for power meter and would be used as a guideline for efficient ATE system in Ka band.

• Journal of Digital Contents Society
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• v.13 no.4
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• pp.491-500
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• 2012

In this paper, a new loopback BIST structure which is effective to test RF transceiver chip and LNA(Low Noise Amplifier) in the chip is presented. Because the presented BIST structure uses a baseband processor in the chip as a tester while the system is under testing mode, the developed test technique has an advantage of performing test application and test evaluation in effectiveness. The presented BIST structure can change high frequency test output signals to a low frequency signals which can make the CUT(circuits under test) tested easily. By using this technique, the necessity of RF test equipment can be mostly reduced. The test time and test cost of RF circuits can be cut down by using proposed BIST structure, and finally the total chip manufacturing costs can be reduced.